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https://github.com/YosysHQ/yosys
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Migrate build system to CMake
See #5895 for details. This commit does not include CI or documentation changes.
This commit is contained in:
Catherine
parent
9d0cdb8551
commit
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208 changed files with 5285 additions and 2294 deletions
225
passes/techmap/CMakeLists.txt
Normal file
225
passes/techmap/CMakeLists.txt
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@ -0,0 +1,225 @@
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yosys_core(libparse
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libparse.cc
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libparse.h
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DATA_DIR
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include/passes/techmap
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DATA_FILES
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libparse.h
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)
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yosys_pass(techmap
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techmap.cc
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REQUIRES
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maccmap
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proc
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read_rtlil
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read_verilog
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sha1
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simplemap
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)
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yosys_pass(simplemap
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simplemap.cc
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)
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yosys_pass(dfflibmap
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dfflibmap.cc
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REQUIRES
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dfflegalize
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libparse
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)
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yosys_pass(maccmap
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maccmap.cc
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)
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yosys_pass(booth
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booth.cc
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)
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yosys_pass(libcache
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libcache.cc
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REQUIRES
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libparse
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)
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set(abc_definitions
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"$<$<BOOL:${YOSYS_ABC_EXECUTABLE}>:ABCEXTERNAL=\"${YOSYS_ABC_EXECUTABLE}\">"
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$<${YOSYS_LINK_ABC}:YOSYS_LINK_ABC>
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)
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yosys_pass(abc
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abc.cc
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DEFINITIONS
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${abc_definitions}
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LIBRARIES
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$<${YOSYS_LINK_ABC}:libyosys-abc>
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REQUIRES
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read_blif
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ENABLE_IF
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YOSYS_ENABLE_ABC
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)
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yosys_pass(abc9_exe
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abc9_exe.cc
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DEFINITIONS
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${abc_definitions}
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LIBRARIES
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$<${YOSYS_LINK_ABC}:libyosys-abc>
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ENABLE_IF
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YOSYS_ENABLE_ABC
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)
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yosys_pass(abc9_ops
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abc9_ops.cc
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REQUIRES
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proc
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)
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yosys_pass(abc9
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abc9.cc
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DEFINITIONS
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${abc_definitions}
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REQUIRES
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abc9_exe
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abc9_ops
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aigmap
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delete
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design
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opt
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portarcs
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read_verilog
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scc
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select
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setattr
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submod
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techmap
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wbflip
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)
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yosys_pass(abc_new
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abc_new.cc
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REQUIRES
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abc9_exe
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abc9_ops
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box_derive
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read_xaiger2
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write_xaiger2
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)
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yosys_pass(iopadmap
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iopadmap.cc
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)
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yosys_pass(clkbufmap
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clkbufmap.cc
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)
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yosys_pass(hilomap
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hilomap.cc
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)
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yosys_pass(extract
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extract.cc
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REQUIRES
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opt_clean
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proc
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read_rtlil
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read_verilog
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subcircuit
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write_rtlil
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)
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yosys_pass(extract_fa
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extract_fa.cc
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)
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yosys_pass(extract_counter
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extract_counter.cc
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)
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yosys_pass(extract_reduce
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extract_reduce.cc
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)
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yosys_pass(alumacc
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alumacc.cc
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)
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yosys_pass(dffinit
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dffinit.cc
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)
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yosys_pass(pmuxtree
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pmuxtree.cc
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)
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yosys_pass(bmuxmap
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bmuxmap.cc
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)
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yosys_pass(demuxmap
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demuxmap.cc
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)
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yosys_pass(bwmuxmap
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bwmuxmap.cc
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)
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yosys_pass(muxcover
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muxcover.cc
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)
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yosys_pass(aigmap
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aigmap.cc
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)
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yosys_pass(tribuf
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tribuf.cc
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)
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yosys_pass(lut2mux
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lut2mux.cc
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)
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yosys_pass(lut2bmux
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lut2bmux.cc
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)
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yosys_pass(nlutmap
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nlutmap.cc
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REQUIRES
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abc
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lut2mux
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opt_clean
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)
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yosys_pass(shregmap
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shregmap.cc
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)
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yosys_pass(deminout
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deminout.cc
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)
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yosys_pass(insbuf
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insbuf.cc
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)
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yosys_pass(bufnorm
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bufnorm.cc
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)
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yosys_pass(attrmvcp
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attrmvcp.cc
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)
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yosys_pass(attrmap
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attrmap.cc
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PROVIDES
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paramap
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)
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yosys_pass(zinit
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zinit.cc
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)
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yosys_pass(dfflegalize
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dfflegalize.cc
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)
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yosys_pass(dffunmap
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dffunmap.cc
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)
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yosys_pass(flowmap
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flowmap.cc
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)
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yosys_pass(extractinv
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extractinv.cc
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)
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yosys_pass(cellmatch
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cellmatch.cc
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)
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yosys_pass(clockgate
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clockgate.cc
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REQUIRES
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libparse
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)
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yosys_pass(constmap
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constmap.cc
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)
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yosys_pass(arith_tree
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arith_tree.cc
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)
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if (YOSYS_ENABLE_SPAWN)
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yosys_cxx_executable(yosys-filterlib
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OUTPUT_NAME yosys-filterlib
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INCLUDE_IN_ALL
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)
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target_sources(yosys-filterlib PRIVATE filterlib.cc)
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target_link_libraries(yosys-filterlib PRIVATE yosys_common)
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endif()
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@ -1,68 +0,0 @@
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OBJS += passes/techmap/techmap.o
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OBJS += passes/techmap/simplemap.o
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OBJS += passes/techmap/dfflibmap.o
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OBJS += passes/techmap/maccmap.o
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OBJS += passes/techmap/booth.o
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OBJS += passes/techmap/libparse.o
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OBJS += passes/techmap/libcache.o
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ifeq ($(ENABLE_ABC),1)
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OBJS += passes/techmap/abc.o
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OBJS += passes/techmap/abc9.o
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OBJS += passes/techmap/abc9_exe.o
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OBJS += passes/techmap/abc9_ops.o
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OBJS += passes/techmap/abc_new.o
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ifneq ($(ABCEXTERNAL),)
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passes/techmap/abc.o: CXXFLAGS += -DABCEXTERNAL='"$(ABCEXTERNAL)"'
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passes/techmap/abc9.o: CXXFLAGS += -DABCEXTERNAL='"$(ABCEXTERNAL)"'
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passes/techmap/abc9_exe.o: CXXFLAGS += -DABCEXTERNAL='"$(ABCEXTERNAL)"'
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passes/techmap/abc_new.o: CXXFLAGS += -DABCEXTERNAL='"$(ABCEXTERNAL)"'
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endif
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endif
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ifneq ($(SMALL),1)
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OBJS += passes/techmap/iopadmap.o
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OBJS += passes/techmap/clkbufmap.o
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OBJS += passes/techmap/hilomap.o
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OBJS += passes/techmap/extract.o
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OBJS += passes/techmap/extract_fa.o
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OBJS += passes/techmap/extract_counter.o
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OBJS += passes/techmap/extract_reduce.o
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OBJS += passes/techmap/alumacc.o
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OBJS += passes/techmap/dffinit.o
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OBJS += passes/techmap/pmuxtree.o
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OBJS += passes/techmap/bmuxmap.o
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OBJS += passes/techmap/demuxmap.o
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OBJS += passes/techmap/bwmuxmap.o
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OBJS += passes/techmap/muxcover.o
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OBJS += passes/techmap/aigmap.o
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OBJS += passes/techmap/tribuf.o
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OBJS += passes/techmap/lut2mux.o
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OBJS += passes/techmap/lut2bmux.o
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OBJS += passes/techmap/nlutmap.o
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OBJS += passes/techmap/shregmap.o
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OBJS += passes/techmap/deminout.o
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OBJS += passes/techmap/insbuf.o
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OBJS += passes/techmap/bufnorm.o
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OBJS += passes/techmap/attrmvcp.o
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OBJS += passes/techmap/attrmap.o
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OBJS += passes/techmap/zinit.o
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OBJS += passes/techmap/dfflegalize.o
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OBJS += passes/techmap/dffunmap.o
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OBJS += passes/techmap/flowmap.o
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OBJS += passes/techmap/extractinv.o
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OBJS += passes/techmap/cellmatch.o
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OBJS += passes/techmap/clockgate.o
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OBJS += passes/techmap/constmap.o
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OBJS += passes/techmap/arith_tree.o
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endif
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ifeq ($(DISABLE_SPAWN),0)
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TARGETS += $(PROGRAM_PREFIX)yosys-filterlib$(EXE)
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EXTRA_OBJS += passes/techmap/filterlib.o
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$(PROGRAM_PREFIX)yosys-filterlib$(EXE): passes/techmap/filterlib.o
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$(Q) mkdir -p $(dir $@)
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$(P) $(CXX) -o $(PROGRAM_PREFIX)yosys-filterlib$(EXE) $(LINKFLAGS) $^ $(EXE_LIBS) $(LIBS)
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endif
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@ -170,7 +170,7 @@ struct AbcSigVal {
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};
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// REUSE_YOSYS_ABC_PROCESSES only works when ABC is built with ENABLE_READLINE.
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#if defined(__linux__) && !defined(YOSYS_DISABLE_SPAWN) && defined(YOSYS_ENABLE_READLINE)
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#if defined(__linux__) && defined(YOSYS_ENABLE_SPAWN) && defined(YOSYS_ENABLE_READLINE)
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#define REUSE_YOSYS_ABC_PROCESSES
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#endif
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