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minor changes

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This commit is contained in:
Artur Swiderski 2020-12-06 12:24:44 +01:00
parent 1452cd88e8
commit cab1f9872b
4 changed files with 18 additions and 40 deletions
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12
techlibs/intel_le/common/le_sim.v
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@ -34,7 +34,7 @@ module MISTRAL_ALUT4(input A, B, C, D, output Q);
parameter [15:0] LUT = 16'h0000;
`ifdef cycloneiv
`ifdef cycloneiv
specify
(A => Q) = 319;
(B => Q) = 323;
@ -98,7 +98,7 @@ module MISTRAL_ALUT_ARITH(input A, B, C, D, (* abc9_carry *) input CI, output SO
parameter LUT = 16'h0000;
`ifdef cycloneiv
`ifdef cycloneiv
specify
(A => SO) = 1342;
(B => SO) = 1323;
@ -106,11 +106,9 @@ specify
(D => SO) = 887;
(CI => SO) = 368;
(A => CO) = 1082;
(B => CO) = 1062;
(C => CO) = 813;
(D => CO) = 866;
(CI => CO) = 36; // Divided by 2 to account for there being two ALUT_ARITHs in an ALM)
(A => CO) = 376;
(B => CO) = 385;
(CI => CO) = 200;
endspecify
`endif
wire q0, q1;