mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-08-22 11:07:52 +00:00
Code Activity

Merge pull request #5284 from jix/fix_5282

Browse source 
check: Limit detailed cell edge checking for $pmux and $bmux
This commit is contained in:
Jannis Harder 2025-08-20 14:27:19 +02:00 • committed by GitHub
commit c9ad7b7ad0
No known key found for this signature in database
GPG key ID: B5690EEEBB952194
1 changed files with 13 additions and 6 deletions
Download patch file Download diff file Expand all files Collapse all files

19
passes/cmds/check.cc
View file

@ -195,16 +195,23 @@ struct CheckPass : public Pass {
// in port widths are those for us to check.
if (!cell->type.in(
ID($add), ID($sub),
ID($shl), ID($shr), ID($sshl), ID($sshr), ID($shift), ID($shiftx)))
ID($shl), ID($shr), ID($sshl), ID($sshr), ID($shift), ID($shiftx),
ID($pmux), ID($bmux)))
return false;
int in_widths = 0, out_widths = 0;
for (auto &conn : cell->connections()) {
if (cell->input(conn.first))
in_widths += conn.second.size();
if (cell->output(conn.first))
out_widths += conn.second.size();
if (cell->type.in(ID($pmux), ID($bmux))) {
// We're skipping inputs A and B, since each of their bits contributes only one edge
in_widths = GetSize(cell->getPort(ID::S));
out_widths = GetSize(cell->getPort(ID::Y));
} else {
for (auto &conn : cell->connections()) {
if (cell->input(conn.first))
in_widths += conn.second.size();
if (cell->output(conn.first))
out_widths += conn.second.size();
}
}
const int threshold = 1024;