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Robert O'Callahan 2025-10-31 17:19:36 +05:30 committed by GitHub
commit c958dd3152
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21 changed files with 75 additions and 78 deletions

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@ -284,11 +284,11 @@ struct EquivMakeWorker
for (int i = 0; i < wire->width; i++) {
if (undriven_bits.count(assign_map(SigBit(gold_wire, i)))) {
log(" Skipping signal bit %s [%d]: undriven on gold side.\n", id2cstr(gold_wire->name), i);
log(" Skipping signal bit %s [%d]: undriven on gold side.\n", log_id(gold_wire->name), i);
continue;
}
if (undriven_bits.count(assign_map(SigBit(gate_wire, i)))) {
log(" Skipping signal bit %s [%d]: undriven on gate side.\n", id2cstr(gate_wire->name), i);
log(" Skipping signal bit %s [%d]: undriven on gate side.\n", log_id(gate_wire->name), i);
continue;
}
equiv_mod->addEquiv(NEW_ID, SigSpec(gold_wire, i), SigSpec(gate_wire, i), SigSpec(wire, i));