From c94aa719d9c8533fdbfafdfed3df00885320f888 Mon Sep 17 00:00:00 2001
From: Miodrag Milanovic <mmicko@gmail.com>
Date: Thu, 18 Jul 2024 16:56:52 +0200
Subject: [PATCH] VHDL is case insensitive, make sure netlist name is proper

---
 frontends/verific/verific.cc | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/frontends/verific/verific.cc b/frontends/verific/verific.cc
index 56e94489c..74a36a344 100644
--- a/frontends/verific/verific.cc
+++ b/frontends/verific/verific.cc
@@ -58,6 +58,7 @@ USING_YOSYS_NAMESPACE
 
 #ifdef VERIFIC_VHDL_SUPPORT
 #include "vhdl_file.h"
+#include "VhdlIdDef.h"
 #include "VhdlUnits.h"
 #include "NameSpace.h"
 #endif
@@ -2817,6 +2818,10 @@ std::set<std::string> import_tops(const char* work, std::map<std::string,Netlist
 				if (show_message)
 					log("Adding VHDL unit '%s' to elaboration queue.\n", name);
 				vhdl_units.InsertLast(vhdl_unit);
+				if (strcmp(name, vhdl_unit->Id()->OrigName()) != 0) {
+					top_mod_names.erase(name);
+					top_mod_names.insert(vhdl_unit->Id()->OrigName());
+				}
 				continue;
 			}
 #endif