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Emit latch warning.

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nella 2026-06-17 11:27:43 +02:00
parent a46bc77eeb
commit c814ef35e3
7 changed files with 16 additions and 1 deletions
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1
techlibs/quicklogic/synth_quicklogic.cc
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@ -315,6 +315,7 @@ struct SynthQuickLogicPass : public ScriptPass {
}
if (check_label("map_luts", "(for pp3)") && (help_mode || family == "pp3")) {
run("check -nolatches");
run("techmap -map " + lib_path + family + "/latches_map.v");
if (abc9) {
run("read_verilog -lib -specify -icells " + lib_path + family + "/abc9_model.v");