From c814ef35e339a896e4276cfcbdd043ede68a5796 Mon Sep 17 00:00:00 2001
From: nella <simontupy64@gmail.com>
Date: Wed, 17 Jun 2026 11:27:43 +0200
Subject: [PATCH] Emit latch warning.

---
 techlibs/efinix/synth_efinix.cc         | 1 +
 techlibs/fabulous/synth_fabulous.cc     | 1 +
 techlibs/ice40/synth_ice40.cc           | 1 +
 techlibs/lattice/synth_lattice.cc       | 4 +++-
 techlibs/nanoxplore/synth_nanoxplore.cc | 1 +
 techlibs/quicklogic/synth_quicklogic.cc | 1 +
 tests/various/synth_latch_warning.ys    | 8 ++++++++
 7 files changed, 16 insertions(+), 1 deletion(-)
 create mode 100644 tests/various/synth_latch_warning.ys

diff --git a/techlibs/efinix/synth_efinix.cc b/techlibs/efinix/synth_efinix.cc
index 14457c64b..788580794 100644
--- a/techlibs/efinix/synth_efinix.cc
+++ b/techlibs/efinix/synth_efinix.cc
@@ -190,6 +190,7 @@ struct SynthEfinixPass : public ScriptPass
 		if (check_label("map_ffs"))
 		{
 			run("dfflegalize -cell $_DFFE_????_ 0 -cell $_SDFFE_????_ 0 -cell $_SDFFCE_????_ 0 -cell $_DLATCH_?_ x");
+			run("check -nolatches");
 			run("techmap -D NO_LUT -map +/efinix/cells_map.v");
 			run("opt_expr -mux_undef");
 			run("simplemap");
diff --git a/techlibs/fabulous/synth_fabulous.cc b/techlibs/fabulous/synth_fabulous.cc
index 0074a52af..67bf35e14 100644
--- a/techlibs/fabulous/synth_fabulous.cc
+++ b/techlibs/fabulous/synth_fabulous.cc
@@ -359,6 +359,7 @@ struct SynthPass : public ScriptPass
 			} else {
 				run("dfflegalize -cell $_DFF_P_ 0 -cell $_DLATCH_?_ x", "without -complex-dff");
 			}
+			run("check -nolatches");
 			run("techmap -map +/fabulous/latches_map.v");
 			run("techmap -map +/fabulous/ff_map.v");
 			if (help_mode) {
diff --git a/techlibs/ice40/synth_ice40.cc b/techlibs/ice40/synth_ice40.cc
index 86189c848..3bdd25746 100644
--- a/techlibs/ice40/synth_ice40.cc
+++ b/techlibs/ice40/synth_ice40.cc
@@ -406,6 +406,7 @@ struct SynthIce40Pass : public ScriptPass
 				run("abc", "      (only if -abc2)");
 				run("ice40_opt", "(only if -abc2)");
 			}
+			run("check -nolatches");
 			run("techmap -map +/ice40/latches_map.v");
 			if (noabc || flowmap || help_mode) {
 				run("simplemap", "                               (if -noabc or -flowmap)");
diff --git a/techlibs/lattice/synth_lattice.cc b/techlibs/lattice/synth_lattice.cc
index 43fb7b1c2..e68298f31 100644
--- a/techlibs/lattice/synth_lattice.cc
+++ b/techlibs/lattice/synth_lattice.cc
@@ -531,8 +531,10 @@ struct SynthLatticePass : public ScriptPass
 		{
 			if (abc2 || help_mode)
 				run("abc", "      (only if -abc2)");
-			if (!asyncprld || help_mode)
+			if (!asyncprld || help_mode) {
+				run("check -nolatches", "(skip if -asyncprld)");
 				run("techmap -map +/lattice/latches_map.v", "(skip if -asyncprld)");
+			}
 
 			if (abc9) {
 				std::string abc9_opts;
diff --git a/techlibs/nanoxplore/synth_nanoxplore.cc b/techlibs/nanoxplore/synth_nanoxplore.cc
index 0b87c98c7..73c9b3876 100644
--- a/techlibs/nanoxplore/synth_nanoxplore.cc
+++ b/techlibs/nanoxplore/synth_nanoxplore.cc
@@ -325,6 +325,7 @@ struct SynthNanoXplorePass : public ScriptPass
 			dfflegalize_args += stringf(" -cell $_DLATCH_?_ x -mince %d -minsrst %d", min_ce_use, min_srst_use);
 			run("dfflegalize" + dfflegalize_args,"($_*DFFE_* only if not -nodffe)");
 			run("opt_merge");
+			run("check -nolatches");
 			run("techmap -map +/nanoxplore/latches_map.v");
 			run("techmap -map +/nanoxplore/cells_map.v");
 			run("opt_expr -undriven -mux_undef");
diff --git a/techlibs/quicklogic/synth_quicklogic.cc b/techlibs/quicklogic/synth_quicklogic.cc
index e65be1c58..05396764a 100644
--- a/techlibs/quicklogic/synth_quicklogic.cc
+++ b/techlibs/quicklogic/synth_quicklogic.cc
@@ -315,6 +315,7 @@ struct SynthQuickLogicPass : public ScriptPass {
 		}
 
 		if (check_label("map_luts", "(for pp3)") && (help_mode || family == "pp3")) {
+			run("check -nolatches");
 			run("techmap -map " + lib_path + family + "/latches_map.v");
 			if (abc9) {
 				run("read_verilog -lib -specify -icells " + lib_path + family + "/abc9_model.v");
diff --git a/tests/various/synth_latch_warning.ys b/tests/various/synth_latch_warning.ys
new file mode 100644
index 000000000..f6394abc7
--- /dev/null
+++ b/tests/various/synth_latch_warning.ys
@@ -0,0 +1,8 @@
+read_verilog <<EOT
+module top(input d, en, output reg q);
+always @* if (en) q = d;
+endmodule
+EOT
+logger -expect warning "is a latch of type" 1
+synth_ice40
+logger -check-expected