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rtlil: fix zero width SigSpec crash in signorm setPort unsetPort
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parent
b311a7fc73
commit
c7ea35e89b
1 changed files with 2 additions and 2 deletions
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@ -953,7 +953,7 @@ void RTLIL::Cell::unsetPort(RTLIL::IdString portname)
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if (found->second.empty())
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if (found->second.empty())
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fanout.erase(found);
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fanout.erase(found);
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}
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}
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} else {
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} else if (GetSize(conn_it->second)) {
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Wire *w = conn_it->second.as_wire();
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Wire *w = conn_it->second.as_wire();
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log_assert(w->driverCell_ == this);
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log_assert(w->driverCell_ == this);
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log_assert(w->driverPort_ == portname);
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log_assert(w->driverPort_ == portname);
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@ -1094,7 +1094,7 @@ void RTLIL::Cell::setPort(RTLIL::IdString portname, RTLIL::SigSpec signal)
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int i = 0;
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int i = 0;
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for (auto bit : signal)
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for (auto bit : signal)
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fanout[bit].insert(PortBit(this, portname, i++));
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fanout[bit].insert(PortBit(this, portname, i++));
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} else {
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} else if (GetSize(signal)) {
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Wire *w = signal.as_wire();
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Wire *w = signal.as_wire();
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log_assert(w->driverCell_ == nullptr);
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log_assert(w->driverCell_ == nullptr);
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log_assert(w->driverPort_.empty());
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log_assert(w->driverPort_.empty());
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