mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-10-02 05:59:31 +00:00
Code Activity

Remove .c_str() from stringf parameters

Browse source
This commit is contained in:
Robert O'Callahan 2025-08-19 22:45:26 +00:00
parent c41ba912d8
commit c7df6954b9
90 changed files with 773 additions and 773 deletions
Download patch file Download diff file Expand all files Collapse all files

10
techlibs/nexus/synth_nexus.cc
View file

@ -254,7 +254,7 @@ struct SynthNexusPass : public ScriptPass
if (check_label("begin"))
{
run("read_verilog -lib -specify +/nexus/cells_sim.v +/nexus/cells_xtra.v");
run(stringf("hierarchy -check %s", help_mode ? "-top <top>" : top_opt.c_str()));
run(stringf("hierarchy -check %s", help_mode ? "-top <top>" : top_opt));
}
if (check_label("coarse"))
@ -361,9 +361,9 @@ struct SynthNexusPass : public ScriptPass
abc9_opts += " -maxlut 4";
std::string k = "synth_nexus.abc9.W";
if (active_design && active_design->scratchpad.count(k))
abc9_opts += stringf(" -W %s", active_design->scratchpad_get_string(k).c_str());
abc9_opts += stringf(" -W %s", active_design->scratchpad_get_string(k));
else
abc9_opts += stringf(" -W %s", RTLIL::constpad.at(k).c_str());
abc9_opts += stringf(" -W %s", RTLIL::constpad.at(k));
if (nowidelut)
abc9_opts += " -maxlut 4";
if (dff)
@ -405,13 +405,13 @@ struct SynthNexusPass : public ScriptPass
if (check_label("json"))
{
if (!json_file.empty() || help_mode)
run(stringf("write_json %s", help_mode ? "<file-name>" : json_file.c_str()));
run(stringf("write_json %s", help_mode ? "<file-name>" : json_file));
}
if (check_label("vm"))
{
if (!vm_file.empty() || help_mode)
run(stringf("write_verilog %s", help_mode ? "<file-name>" : vm_file.c_str()));
run(stringf("write_verilog %s", help_mode ? "<file-name>" : vm_file));
}
}
} SynthNexusPass;