mirror of
https://github.com/YosysHQ/yosys
synced 2025-09-13 13:11:27 +00:00
Remove .c_str() from stringf parameters
This commit is contained in:
parent
c41ba912d8
commit
c7df6954b9
90 changed files with 773 additions and 773 deletions
|
@ -169,17 +169,17 @@ struct SynthIntelALMPass : public ScriptPass {
|
|||
|
||||
if (check_label("begin")) {
|
||||
if (family_opt == "cyclonev")
|
||||
run(stringf("read_verilog -sv -lib +/intel_alm/%s/cells_sim.v", family_opt.c_str()));
|
||||
run(stringf("read_verilog -specify -lib -D %s +/intel_alm/common/alm_sim.v", family_opt.c_str()));
|
||||
run(stringf("read_verilog -specify -lib -D %s +/intel_alm/common/dff_sim.v", family_opt.c_str()));
|
||||
run(stringf("read_verilog -specify -lib -D %s +/intel_alm/common/dsp_sim.v", family_opt.c_str()));
|
||||
run(stringf("read_verilog -specify -lib -D %s +/intel_alm/common/mem_sim.v", family_opt.c_str()));
|
||||
run(stringf("read_verilog -specify -lib -D %s +/intel_alm/common/misc_sim.v", family_opt.c_str()));
|
||||
run(stringf("read_verilog -specify -lib -D %s -icells +/intel_alm/common/abc9_model.v", family_opt.c_str()));
|
||||
run(stringf("read_verilog -sv -lib +/intel_alm/%s/cells_sim.v", family_opt));
|
||||
run(stringf("read_verilog -specify -lib -D %s +/intel_alm/common/alm_sim.v", family_opt));
|
||||
run(stringf("read_verilog -specify -lib -D %s +/intel_alm/common/dff_sim.v", family_opt));
|
||||
run(stringf("read_verilog -specify -lib -D %s +/intel_alm/common/dsp_sim.v", family_opt));
|
||||
run(stringf("read_verilog -specify -lib -D %s +/intel_alm/common/mem_sim.v", family_opt));
|
||||
run(stringf("read_verilog -specify -lib -D %s +/intel_alm/common/misc_sim.v", family_opt));
|
||||
run(stringf("read_verilog -specify -lib -D %s -icells +/intel_alm/common/abc9_model.v", family_opt));
|
||||
// Misc and common cells
|
||||
run("read_verilog -lib +/intel/common/altpll_bb.v");
|
||||
run("read_verilog -lib +/intel_alm/common/megafunction_bb.v");
|
||||
run(stringf("hierarchy -check %s", help_mode ? "-top <top>" : top_opt.c_str()));
|
||||
run(stringf("hierarchy -check %s", help_mode ? "-top <top>" : top_opt));
|
||||
}
|
||||
|
||||
if (check_label("coarse")) {
|
||||
|
@ -225,8 +225,8 @@ struct SynthIntelALMPass : public ScriptPass {
|
|||
}
|
||||
|
||||
if (!nobram && check_label("map_bram", "(skip if -nobram)")) {
|
||||
run(stringf("memory_bram -rules +/intel_alm/common/bram_%s.txt", bram_type.c_str()));
|
||||
run(stringf("techmap -map +/intel_alm/common/bram_%s_map.v", bram_type.c_str()));
|
||||
run(stringf("memory_bram -rules +/intel_alm/common/bram_%s.txt", bram_type));
|
||||
run(stringf("techmap -map +/intel_alm/common/bram_%s_map.v", bram_type));
|
||||
}
|
||||
|
||||
if (!nolutram && check_label("map_lutram", "(skip if -nolutram)")) {
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue