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https://github.com/YosysHQ/yosys
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Remove .c_str() from stringf parameters
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parent
c41ba912d8
commit
c7df6954b9
90 changed files with 773 additions and 773 deletions
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@ -302,7 +302,7 @@ struct SynthIce40Pass : public ScriptPass
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if (check_label("begin"))
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{
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run("read_verilog " + define + " -lib -specify +/ice40/cells_sim.v");
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run(stringf("hierarchy -check %s", help_mode ? "-top <top>" : top_opt.c_str()));
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run(stringf("hierarchy -check %s", help_mode ? "-top <top>" : top_opt));
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run("proc");
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}
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@ -419,10 +419,10 @@ struct SynthIce40Pass : public ScriptPass
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std::string abc9_opts;
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std::string k = "synth_ice40.abc9.W";
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if (active_design && active_design->scratchpad.count(k))
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abc9_opts += stringf(" -W %s", active_design->scratchpad_get_string(k).c_str());
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abc9_opts += stringf(" -W %s", active_design->scratchpad_get_string(k));
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else {
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k = stringf("synth_ice40.abc9.%s.W", device_opt.c_str());
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abc9_opts += stringf(" -W %s", RTLIL::constpad.at(k).c_str());
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k = stringf("synth_ice40.abc9.%s.W", device_opt);
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abc9_opts += stringf(" -W %s", RTLIL::constpad.at(k));
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}
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if (dff)
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abc9_opts += " -dff";
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@ -475,13 +475,13 @@ struct SynthIce40Pass : public ScriptPass
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if (check_label("edif"))
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{
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if (!edif_file.empty() || help_mode)
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run(stringf("write_edif %s", help_mode ? "<file-name>" : edif_file.c_str()));
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run(stringf("write_edif %s", help_mode ? "<file-name>" : edif_file));
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}
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if (check_label("json"))
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{
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if (!json_file.empty() || help_mode)
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run(stringf("write_json %s", help_mode ? "<file-name>" : json_file.c_str()));
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run(stringf("write_json %s", help_mode ? "<file-name>" : json_file));
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}
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}
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} SynthIce40Pass;
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