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Added $bu0 cell (for easy correct $eq/$ne mapping)

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This commit is contained in:
Clifford Wolf 2013-12-28 11:54:40 +01:00
parent 7f71787599
commit c69c416d28
6 changed files with 35 additions and 5 deletions
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13
passes/techmap/simplemap.cc
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@ -60,6 +60,18 @@ static void simplemap_pos(RTLIL::Module *module, RTLIL::Cell *cell)
module->connections.push_back(RTLIL::SigSig(sig_y, sig_a));
}
static void simplemap_bu0(RTLIL::Module *module, RTLIL::Cell *cell)
{
int width = cell->parameters.at("\\Y_WIDTH").as_int();
RTLIL::SigSpec sig_a = cell->connections.at("\\A");
sig_a.extend_u0(width, cell->parameters.at("\\A_SIGNED").as_bool());
RTLIL::SigSpec sig_y = cell->connections.at("\\Y");
module->connections.push_back(RTLIL::SigSig(sig_y, sig_a));
}
static void simplemap_bitop(RTLIL::Module *module, RTLIL::Cell *cell)
{
int width = cell->parameters.at("\\Y_WIDTH").as_int();
@ -454,6 +466,7 @@ void simplemap_get_mappers(std::map<std::string, void(*)(RTLIL::Module*, RTLIL::
{
mappers["$not"] = simplemap_not;
mappers["$pos"] = simplemap_pos;
mappers["$bu0"] = simplemap_bu0;
mappers["$and"] = simplemap_bitop;
mappers["$or"] = simplemap_bitop;
mappers["$xor"] = simplemap_bitop;