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Merge pull request #518 from xerpi/master

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passes/hierarchy: Reduce code duplication in expand_module
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Clifford Wolf 2018-03-27 14:10:39 +02:00 • committed by GitHub
commit c652774ca2
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1 changed files with 13 additions and 15 deletions
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24
passes/hierarchy/hierarchy.cc
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@ -173,22 +173,20 @@ bool expand_module(RTLIL::Design *design, RTLIL::Module *module, bool flag_check
for (auto &dir : libdirs) for (auto &dir : libdirs)
{ {
filename = dir + "/" + RTLIL::unescape_id(cell->type) + ".v"; static const std::map<std::string, std::string> extensions_map =
{
{".v", "verilog"},
{".sv", "verilog -sv"},
{".il", "ilang"}
};
for (auto &ext : extensions_map)
{
filename = dir + "/" + RTLIL::unescape_id(cell->type) + ext.first;
if (check_file_exists(filename)) { if (check_file_exists(filename)) {
Frontend::frontend_call(design, NULL, filename, "verilog"); Frontend::frontend_call(design, NULL, filename, ext.second);
goto loaded_module; goto loaded_module;
} }
filename = dir + "/" + RTLIL::unescape_id(cell->type) + ".sv";
if (check_file_exists(filename)) {
Frontend::frontend_call(design, NULL, filename, "verilog -sv");
goto loaded_module;
}
filename = dir + "/" + RTLIL::unescape_id(cell->type) + ".il";
if (check_file_exists(filename)) {
Frontend::frontend_call(design, NULL, filename, "ilang");
goto loaded_module;
} }
} }