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remove port direction workaround from test case

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This commit is contained in:
Stefan Biereigel 2019-05-27 18:10:39 +02:00
parent 7f11a73210
commit c5fe04acfd
1 changed files with 1 additions and 2 deletions
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3
tests/various/wandwor.v
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@ -17,7 +17,6 @@ module c;
wand E;
wire E_wire = E;
genvar i;
for (i = 0; i < 3; i = i + 1)
@ -27,7 +26,7 @@ module c;
);
b b_inst (
.D(E_wire)
.D(E)
);
end