mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-08-07 19:51:23 +00:00
Code Activity

Added GreenPAK4 skeleton

Browse source
This commit is contained in:
Clifford Wolf 2015-09-16 09:28:37 +02:00
parent e7c018e5d1
commit c5352f45c3
4 changed files with 297 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

38
techlibs/greenpak4/cells_map.v Normal file
View file

@ -0,0 +1,38 @@
module \$_DFF_P_ (input D, C, output Q);
DFF _TECHMAP_REPLACE_ (
.D(D),
.Q(Q),
.CLK(C),
.nRSTZ(1'b1),
.nSETZ(1'b1)
);
endmodule
module \$lut (A, Y);
parameter WIDTH = 0;
parameter LUT = 0;
input [WIDTH-1:0] A;
output Y;
generate
if (WIDTH == 1) begin
LUT2 #(.INIT(LUT)) _TECHMAP_REPLACE_ (.OUT(Y),
.IN0(A[0]), .IN1(1'b0));
end else
if (WIDTH == 2) begin
LUT2 #(.INIT(LUT)) _TECHMAP_REPLACE_ (.OUT(Y),
.IN0(A[0]), .IN1(A[1]));
end else
if (WIDTH == 3) begin
LUT3 #(.INIT(LUT)) _TECHMAP_REPLACE_ (.OUT(Y),
.IN0(A[0]), .IN1(A[1]), .IN2(A[2]));
end else
if (WIDTH == 4) begin
LUT4 #(.INIT(LUT)) _TECHMAP_REPLACE_ (.OUT(Y),
.IN0(A[0]), .IN1(A[1]), .IN2(A[2]), .IN3(A[3]));
end else begin
wire _TECHMAP_FAIL_ = 1;
end
endgenerate
endmodule