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Release version 0.51
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16
CHANGELOG
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CHANGELOG
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List of major changes and improvements between releases
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=======================================================
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Yosys 0.50 .. Yosys 0.51-dev
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Yosys 0.50 .. Yosys 0.51
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--------------------------
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* New commands and options
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- Added "abstract" pass to allow reducing and never increasing
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the constraints on a circuit's behavior in a formal verification setting.
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* Various
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- "splitcells" pass now splits "aldff" cells.
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- FunctionalIR documentation
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* QuickLogic support
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- Added IOFF inference for qlf_k6n10f
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* Intel support
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- Fixed RAM and DSP support.
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- Overall performance improvement for "synth_intel".
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Yosys 0.49 .. Yosys 0.50
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--------------------------
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