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Merge pull request #5304 from rocallahan/idstring-stringf

Support `IdString` parameters in `stringf()` and remove `.c_str()` in a lot of places
This commit is contained in:
Jannis Harder 2025-09-08 20:29:20 +02:00 committed by GitHub
commit c468ee7add
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GPG key ID: B5690EEEBB952194
92 changed files with 807 additions and 775 deletions

View file

@ -126,14 +126,14 @@ struct BugpointPass : public Pass {
string bugpoint_file = "bugpoint-case";
if (suffix.size())
bugpoint_file += stringf(".%.8s", suffix.c_str());
bugpoint_file += stringf(".%.8s", suffix);
std::ofstream f(bugpoint_file + ".il");
RTLIL_BACKEND::dump_design(f, design, /*only_selected=*/false, /*flag_m=*/true, /*flag_n=*/false);
f.close();
string yosys_cmdline = stringf("%s %s -qq -L %s.log %s %s.il", runner.c_str(), yosys_cmd.c_str(), bugpoint_file.c_str(), yosys_arg.c_str(), bugpoint_file.c_str());
if (catch_err) yosys_cmdline += stringf(" 2>%s.err", bugpoint_file.c_str());
string yosys_cmdline = stringf("%s %s -qq -L %s.log %s %s.il", runner, yosys_cmd, bugpoint_file, yosys_arg, bugpoint_file);
if (catch_err) yosys_cmdline += stringf(" 2>%s.err", bugpoint_file);
auto status = run_command(yosys_cmdline);
// we're not processing lines, which means we're getting raw system() returns
if(WIFEXITED(status))
@ -156,7 +156,7 @@ struct BugpointPass : public Pass {
string bugpoint_file = "bugpoint-case";
if (suffix.size())
bugpoint_file += stringf(".%.8s", suffix.c_str());
bugpoint_file += stringf(".%.8s", suffix);
bugpoint_file += err ? ".err" : ".log";
std::ifstream f(bugpoint_file);
@ -469,13 +469,13 @@ struct BugpointPass : public Pass {
if (args[argidx] == "-script" && argidx + 1 < args.size()) {
if (!yosys_arg.empty())
log_cmd_error("A -script or -command option can be only provided once!\n");
yosys_arg = stringf("-s %s", args[++argidx].c_str());
yosys_arg = stringf("-s %s", args[++argidx]);
continue;
}
if (args[argidx] == "-command" && argidx + 1 < args.size()) {
if (!yosys_arg.empty())
log_cmd_error("A -script or -command option can be only provided once!\n");
yosys_arg = stringf("-p %s", args[++argidx].c_str());
yosys_arg = stringf("-p %s", args[++argidx]);
continue;
}
if (args[argidx] == "-grep" && argidx + 1 < args.size()) {

View file

@ -322,7 +322,7 @@ struct CheckPass : public Pass {
if (wire_drivers.count(state)) {
string message = stringf("Drivers conflicting with a constant %s driver:\n", log_signal(state));
for (auto str : wire_drivers[state])
message += stringf(" %s\n", str.c_str());
message += stringf(" %s\n", str);
log_warning("%s", message.c_str());
counter++;
}
@ -331,7 +331,7 @@ struct CheckPass : public Pass {
if (wire_drivers_count[it.first] > 1) {
string message = stringf("multiple conflicting drivers for %s.%s:\n", log_id(module), log_signal(it.first));
for (auto str : it.second)
message += stringf(" %s\n", str.c_str());
message += stringf(" %s\n", str);
log_warning("%s", message.c_str());
counter++;
}
@ -394,10 +394,10 @@ struct CheckPass : public Pass {
std::string driver_src;
if (driver->has_attribute(ID::src)) {
std::string src_attr = driver->get_src_attribute();
driver_src = stringf(" source: %s", src_attr.c_str());
driver_src = stringf(" source: %s", src_attr);
}
message += stringf(" cell %s (%s)%s\n", log_id(driver), log_id(driver->type), driver_src.c_str());
message += stringf(" cell %s (%s)%s\n", log_id(driver), log_id(driver->type), driver_src);
if (!coarsened_cells.count(driver)) {
MatchingEdgePrinter printer(message, sigmap, prev, bit);
@ -411,9 +411,9 @@ struct CheckPass : public Pass {
std::string wire_src;
if (wire->has_attribute(ID::src)) {
std::string src_attr = wire->get_src_attribute();
wire_src = stringf(" source: %s", src_attr.c_str());
wire_src = stringf(" source: %s", src_attr);
}
message += stringf(" wire %s%s\n", log_signal(SigBit(wire, pair.second)), wire_src.c_str());
message += stringf(" wire %s%s\n", log_signal(SigBit(wire, pair.second)), wire_src);
}
prev = bit;

View file

@ -372,7 +372,7 @@ struct DftTagWorker {
void propagate_tags(Cell *cell)
{
if (cell->type == ID($set_tag)) {
IdString tag = stringf("\\%s", cell->getParam(ID::TAG).decode_string().c_str());
IdString tag = stringf("\\%s", cell->getParam(ID::TAG).decode_string());
if (all_tags.insert(tag).second) {
auto group_sep = tag.str().find(':');
IdString tag_group = group_sep != std::string::npos ? tag.str().substr(0, group_sep) : tag;
@ -478,7 +478,7 @@ struct DftTagWorker {
void process_cell(IdString tag, Cell *cell)
{
if (cell->type == ID($set_tag)) {
IdString cell_tag = stringf("\\%s", cell->getParam(ID::TAG).decode_string().c_str());
IdString cell_tag = stringf("\\%s", cell->getParam(ID::TAG).decode_string());
auto tag_sig_a = tag_signal(tag, cell->getPort(ID::A));
auto &sig_y = cell->getPort(ID::Y);
@ -752,7 +752,7 @@ struct DftTagWorker {
for (auto cell : get_tag_cells) {
auto &sig_a = cell->getPort(ID::A);
IdString tag = stringf("\\%s", cell->getParam(ID::TAG).decode_string().c_str());
IdString tag = stringf("\\%s", cell->getParam(ID::TAG).decode_string());
tag_signal(tag, sig_a);
}
@ -772,7 +772,7 @@ struct DftTagWorker {
continue;
int index = 0;
auto name = module->uniquify(stringf("%s:%s", wire->name.c_str(), tag.c_str() + 1), index);
auto name = module->uniquify(stringf("%s:%s", wire->name, tag.c_str() + 1), index);
auto hdlname = wire->get_hdlname_attribute();
if (!hdlname.empty())
@ -817,7 +817,7 @@ struct DftTagWorker {
for (auto cell : get_tag_cells) {
auto &sig_a = cell->getPort(ID::A);
auto &sig_y = cell->getPort(ID::Y);
IdString tag = stringf("\\%s", cell->getParam(ID::TAG).decode_string().c_str());
IdString tag = stringf("\\%s", cell->getParam(ID::TAG).decode_string());
auto tag_sig = tag_signal(tag, sig_a);
module->connect(sig_y, tag_sig);

View file

@ -163,7 +163,7 @@ private:
std::vector<RTLIL::SigSpec> next_pmux_y_ports, pmux_y_ports(costs.begin(), costs.begin() + exp2(select_width));
for (auto i = 0; pmux_y_ports.size() > 1; ++i) {
for (auto j = 0; j+1 < GetSize(pmux_y_ports); j += 2) {
next_pmux_y_ports.emplace_back(module->Pmux(stringf("%s_mux_%d_%d", metamux_select.as_wire()->name.c_str(), i, j), pmux_y_ports[j], pmux_y_ports[j+1], metamux_select[GetSize(metamux_select) - 1 - i], metamux_select.as_wire()->get_src_attribute()));
next_pmux_y_ports.emplace_back(module->Pmux(stringf("%s_mux_%d_%d", metamux_select.as_wire()->name, i, j), pmux_y_ports[j], pmux_y_ports[j+1], metamux_select[GetSize(metamux_select) - 1 - i], metamux_select.as_wire()->get_src_attribute()));
}
if (GetSize(pmux_y_ports) % 2 == 1)
next_pmux_y_ports.push_back(pmux_y_ports[GetSize(pmux_y_ports) - 1]);
@ -206,7 +206,7 @@ private:
int num_versions = opt_instrumentmore? 8 : 4;
for (auto i = 1; i <= num_versions; ++i)
taint_version.emplace_back(RTLIL::SigSpec(module->addWire(stringf("%s_y%d", cell->name.c_str(), i), 1)));
taint_version.emplace_back(RTLIL::SigSpec(module->addWire(stringf("%s_y%d", cell->name, i), 1)));
for (auto i = 0; i < num_versions; ++i) {
switch(i) {
@ -239,7 +239,7 @@ private:
std::vector<RTLIL::SigSpec> next_meta_mux_y_ports, meta_mux_y_ports(taint_version);
for (auto i = 0; meta_mux_y_ports.size() > 1; ++i) {
for (auto j = 0; j+1 < GetSize(meta_mux_y_ports); j += 2) {
next_meta_mux_y_ports.emplace_back(module->Mux(stringf("%s_mux_%d_%d", cell->name.c_str(), i, j), meta_mux_y_ports[j], meta_mux_y_ports[j+1], meta_mux_select[GetSize(meta_mux_select) - 1 - i]));
next_meta_mux_y_ports.emplace_back(module->Mux(stringf("%s_mux_%d_%d", cell->name, i, j), meta_mux_y_ports[j], meta_mux_y_ports[j+1], meta_mux_select[GetSize(meta_mux_select) - 1 - i]));
}
if (GetSize(meta_mux_y_ports) % 2 == 1)
next_meta_mux_y_ports.push_back(meta_mux_y_ports[GetSize(meta_mux_y_ports) - 1]);
@ -271,7 +271,7 @@ private:
log_assert(exp2(select_width) == num_versions);
for (auto i = 1; i <= num_versions; ++i)
taint_version.emplace_back(RTLIL::SigSpec(module->addWire(stringf("%s_y%d", cell->name.c_str(), i), 1)));
taint_version.emplace_back(RTLIL::SigSpec(module->addWire(stringf("%s_y%d", cell->name, i), 1)));
for (auto i = 0; i < num_versions; ++i) {
switch(i) {
@ -294,7 +294,7 @@ private:
std::vector<RTLIL::SigSpec> next_meta_mux_y_ports, meta_mux_y_ports(taint_version);
for (auto i = 0; meta_mux_y_ports.size() > 1; ++i) {
for (auto j = 0; j+1 < GetSize(meta_mux_y_ports); j += 2) {
next_meta_mux_y_ports.emplace_back(module->Mux(stringf("%s_mux_%d_%d", cell->name.c_str(), i, j), meta_mux_y_ports[j], meta_mux_y_ports[j+1], meta_mux_select[GetSize(meta_mux_select) - 1 - i]));
next_meta_mux_y_ports.emplace_back(module->Mux(stringf("%s_mux_%d_%d", cell->name, i, j), meta_mux_y_ports[j], meta_mux_y_ports[j+1], meta_mux_select[GetSize(meta_mux_select) - 1 - i]));
}
if (GetSize(meta_mux_y_ports) % 2 == 1)
next_meta_mux_y_ports.push_back(meta_mux_y_ports[GetSize(meta_mux_y_ports) - 1]);

View file

@ -243,7 +243,7 @@ struct PortarcsPass : Pass {
if (draw_mode) {
auto bit_str = [](SigBit bit) {
return stringf("%s%d", RTLIL::unescape_id(bit.wire->name.str()).c_str(), bit.offset);
return stringf("%s%d", RTLIL::unescape_id(bit.wire->name.str()), bit.offset);
};
std::vector<std::string> headings;

View file

@ -64,7 +64,7 @@ static std::string derive_name_from_src(const std::string &src, int counter)
if (src_base.empty())
return stringf("$%d", counter);
else
return stringf("\\%s$%d", src_base.c_str(), counter);
return stringf("\\%s$%d", src_base, counter);
}
static IdString derive_name_from_cell_output_wire(const RTLIL::Cell *cell, string suffix, bool move_to_cell)
@ -422,7 +422,7 @@ struct RenamePass : public Pass {
if (wire_suffix.empty()) {
for (auto const &[port, _] : cell->connections()) {
if (cell->output(port)) {
wire_suffix += stringf("%s.%s", cell->type.c_str(), port.c_str() + 1);
wire_suffix += stringf("%s.%s", cell->type, port.c_str() + 1);
break;
}
}
@ -449,7 +449,7 @@ struct RenamePass : public Pass {
for (auto wire : module->selected_wires())
if (wire->name[0] == '$') {
RTLIL::IdString buf;
do buf = stringf("\\%s%d%s", pattern_prefix.c_str(), counter++, pattern_suffix.c_str());
do buf = stringf("\\%s%d%s", pattern_prefix, counter++, pattern_suffix);
while (module->wire(buf) != nullptr);
new_wire_names[wire] = buf;
}
@ -457,7 +457,7 @@ struct RenamePass : public Pass {
for (auto cell : module->selected_cells())
if (cell->name[0] == '$') {
RTLIL::IdString buf;
do buf = stringf("\\%s%d%s", pattern_prefix.c_str(), counter++, pattern_suffix.c_str());
do buf = stringf("\\%s%d%s", pattern_prefix, counter++, pattern_suffix);
while (module->cell(buf) != nullptr);
new_cell_names[cell] = buf;
}

View file

@ -149,7 +149,7 @@ struct ShowWorker
{
for (auto &s : color_selections)
if (s.second.selected_member(module->name, member_name)) {
return stringf("color=\"%s\", fontcolor=\"%s\"", s.first.c_str(), s.first.c_str());
return stringf("color=\"%s\", fontcolor=\"%s\"", s.first, s.first);
}
RTLIL::Const colorattr_value;
@ -308,11 +308,11 @@ struct ShowWorker
std::string repinfo = rep > 1 ? stringf("%dx ", rep) : "";
std::string portside = stringf("%d:%d", bitpos, bitpos - rep*c.width + 1);
std::string remoteside = stringf("%s%d:%d", repinfo.c_str(), cl, cr);
std::string remoteside = stringf("%s%d:%d", repinfo, cl, cr);
if (driver) {
log_assert(!net.empty());
label_pieces.push_back(stringf("<s%d> %s - %s ", chunk_idx, portside.c_str(), remoteside.c_str()));
label_pieces.push_back(stringf("<s%d> %s - %s ", chunk_idx, portside, remoteside));
net_conn_map[net].in.insert({stringf("x%d:s%d", dot_idx, chunk_idx), rep*c.width});
net_conn_map[net].color = nextColor(c, net_conn_map[net].color);
} else {
@ -325,7 +325,7 @@ struct ShowWorker
c.data.front() == State::Sz ? 'Z' : '?',
bitpos, bitpos-rep*c.width+1));
} else {
label_pieces.push_back(stringf("<s%d> %s - %s ", chunk_idx, remoteside.c_str(), portside.c_str()));
label_pieces.push_back(stringf("<s%d> %s - %s ", chunk_idx, remoteside, portside));
net_conn_map[net].out.insert({stringf("x%d:s%d", dot_idx, chunk_idx), rep*c.width});
net_conn_map[net].color = nextColor(c, net_conn_map[net].color);
}
@ -335,14 +335,14 @@ struct ShowWorker
}
code += stringf("x%d [ shape=record, style=rounded, label=\"", dot_idx) \
+ join_label_pieces(label_pieces) + stringf("\", %s ];\n", nextColor(sig).c_str());
+ join_label_pieces(label_pieces) + stringf("\", %s ];\n", nextColor(sig));
if (!port.empty()) {
currentColor = xorshift32(currentColor);
if (driver)
code += stringf("%s:e -> x%d:w [arrowhead=odiamond, arrowtail=odiamond, dir=both, %s, %s];\n", port.c_str(), dot_idx, nextColor(sig).c_str(), widthLabel(sig.size()).c_str());
code += stringf("%s:e -> x%d:w [arrowhead=odiamond, arrowtail=odiamond, dir=both, %s, %s];\n", port, dot_idx, nextColor(sig), widthLabel(sig.size()));
else
code += stringf("x%d:e -> %s:w [arrowhead=odiamond, arrowtail=odiamond, dir=both, %s, %s];\n", dot_idx, port.c_str(), nextColor(sig).c_str(), widthLabel(sig.size()).c_str());
code += stringf("x%d:e -> %s:w [arrowhead=odiamond, arrowtail=odiamond, dir=both, %s, %s];\n", dot_idx, port, nextColor(sig), widthLabel(sig.size()));
}
if (node != nullptr)
*node = stringf("x%d", dot_idx);
@ -490,7 +490,7 @@ struct ShowWorker
std::string in_label = join_label_pieces(in_label_pieces);
std::string out_label = join_label_pieces(out_label_pieces);
std::string label_string = stringf("{{%s}|%s\\n%s|{%s}}", in_label.c_str(),
std::string label_string = stringf("{{%s}|%s\\n%s|{%s}}", in_label,
findLabel(cell->name.str()), escape(cell->type.str()),
out_label.c_str());
@ -904,8 +904,8 @@ struct ShowPass : public Pass {
if (libs.size() > 0)
log_header(design, "Continuing show pass.\n");
std::string dot_file = stringf("%s.dot", prefix.c_str());
std::string out_file = stringf("%s.%s", prefix.c_str(), format.empty() ? "svg" : format.c_str());
std::string dot_file = stringf("%s.dot", prefix);
std::string out_file = stringf("%s.%s", prefix, format.empty() ? "svg" : format);
log("Writing dot description to `%s'.\n", dot_file.c_str());
FILE *f = fopen(dot_file.c_str(), "w");
@ -932,7 +932,7 @@ struct ShowPass : public Pass {
#else
#define DOT_CMD "dot -T%s '%s' > '%s.new' && mv '%s.new' '%s'"
#endif
std::string cmd = stringf(DOT_CMD, format.c_str(), dot_file.c_str(), out_file.c_str(), out_file.c_str(), out_file.c_str());
std::string cmd = stringf(DOT_CMD, format, dot_file, out_file, out_file, out_file);
#undef DOT_CMD
log("Exec: %s\n", cmd.c_str());
#if !defined(YOSYS_DISABLE_SPAWN)
@ -950,9 +950,9 @@ struct ShowPass : public Pass {
// system()/cmd.exe does not understand single quotes nor
// background tasks on Windows. So we have to pause yosys
// until the viewer exits.
std::string cmd = stringf("%s \"%s\"", viewer_exe.c_str(), out_file.c_str());
std::string cmd = stringf("%s \"%s\"", viewer_exe, out_file);
#else
std::string cmd = stringf("%s '%s' %s", viewer_exe.c_str(), out_file.c_str(), background.c_str());
std::string cmd = stringf("%s '%s' %s", viewer_exe, out_file, background);
#endif
log("Exec: %s\n", cmd.c_str());
if (run_command(cmd) != 0)
@ -960,9 +960,9 @@ struct ShowPass : public Pass {
} else
if (format.empty()) {
#ifdef __APPLE__
std::string cmd = stringf("ps -fu %d | grep -q '[ ]%s' || xdot '%s' %s", getuid(), dot_file.c_str(), dot_file.c_str(), background.c_str());
std::string cmd = stringf("ps -fu %d | grep -q '[ ]%s' || xdot '%s' %s", getuid(), dot_file, dot_file, background);
#else
std::string cmd = stringf("{ test -f '%s.pid' && fuser -s '%s.pid' 2> /dev/null; } || ( echo $$ >&3; exec xdot '%s'; ) 3> '%s.pid' %s", dot_file.c_str(), dot_file.c_str(), dot_file.c_str(), dot_file.c_str(), background.c_str());
std::string cmd = stringf("{ test -f '%s.pid' && fuser -s '%s.pid' 2> /dev/null; } || ( echo $$ >&3; exec xdot '%s'; ) 3> '%s.pid' %s", dot_file, dot_file, dot_file, dot_file, background);
#endif
log("Exec: %s\n", cmd.c_str());
if (run_command(cmd) != 0)

View file

@ -193,19 +193,19 @@ struct statdata_t {
int width_a = cell->hasPort(ID::A) ? GetSize(cell->getPort(ID::A)) : 0;
int width_b = cell->hasPort(ID::B) ? GetSize(cell->getPort(ID::B)) : 0;
int width_y = cell->hasPort(ID::Y) ? GetSize(cell->getPort(ID::Y)) : 0;
cell_type = stringf("%s_%d", cell_type.c_str(), max<int>({width_a, width_b, width_y}));
cell_type = stringf("%s_%d", cell_type, max<int>({width_a, width_b, width_y}));
} else if (cell_type.in(ID($mux)))
cell_type = stringf("%s_%d", cell_type.c_str(), GetSize(cell->getPort(ID::Y)));
cell_type = stringf("%s_%d", cell_type, GetSize(cell->getPort(ID::Y)));
else if (cell_type.in(ID($bmux), ID($pmux)))
cell_type =
stringf("%s_%d_%d", cell_type.c_str(), GetSize(cell->getPort(ID::Y)), GetSize(cell->getPort(ID::S)));
stringf("%s_%d_%d", cell_type, GetSize(cell->getPort(ID::Y)), GetSize(cell->getPort(ID::S)));
else if (cell_type == ID($demux))
cell_type =
stringf("%s_%d_%d", cell_type.c_str(), GetSize(cell->getPort(ID::A)), GetSize(cell->getPort(ID::S)));
stringf("%s_%d_%d", cell_type, GetSize(cell->getPort(ID::A)), GetSize(cell->getPort(ID::S)));
else if (cell_type.in(ID($sr), ID($ff), ID($dff), ID($dffe), ID($dffsr), ID($dffsre), ID($adff), ID($adffe),
ID($sdff), ID($sdffe), ID($sdffce), ID($aldff), ID($aldffe), ID($dlatch), ID($adlatch),
ID($dlatchsr)))
cell_type = stringf("%s_%d", cell_type.c_str(), GetSize(cell->getPort(ID::Q)));
cell_type = stringf("%s_%d", cell_type, GetSize(cell->getPort(ID::Q)));
}
if (!cell_area.empty()) {

View file

@ -320,7 +320,7 @@ struct EstimateSta {
std::string cell_src;
if (cell->has_attribute(ID::src)) {
std::string src_attr = cell->get_src_attribute();
cell_src = stringf(" source: %s", src_attr.c_str());
cell_src = stringf(" source: %s", src_attr);
}
log(" cell %s (%s)%s\n", log_id(cell), log_id(cell->type), cell_src.c_str());
printed.insert(cell);
@ -331,7 +331,7 @@ struct EstimateSta {
std::string wire_src;
if (bit.wire && bit.wire->has_attribute(ID::src)) {
std::string src_attr = bit.wire->get_src_attribute();
wire_src = stringf(" source: %s", src_attr.c_str());
wire_src = stringf(" source: %s", src_attr);
}
log(" wire %s%s (level %ld)\n", log_signal(bit), wire_src.c_str(), levels[node]);
}

View file

@ -982,8 +982,8 @@ struct VizPass : public Pass {
if (modlist.empty())
log_cmd_error("Nothing there to show.\n");
std::string dot_file = stringf("%s.dot", prefix.c_str());
std::string out_file = stringf("%s.%s", prefix.c_str(), format.empty() ? "svg" : format.c_str());
std::string dot_file = stringf("%s.dot", prefix);
std::string out_file = stringf("%s.%s", prefix, format.empty() ? "svg" : format);
if (custom_prefix)
yosys_output_files.insert(dot_file);
@ -1026,7 +1026,7 @@ struct VizPass : public Pass {
#else
#define DOT_CMD "dot -T%s '%s' > '%s.new' && mv '%s.new' '%s'"
#endif
std::string cmd = stringf(DOT_CMD, format.c_str(), dot_file.c_str(), out_file.c_str(), out_file.c_str(), out_file.c_str());
std::string cmd = stringf(DOT_CMD, format, dot_file, out_file, out_file, out_file);
#undef DOT_CMD
log("Exec: %s\n", cmd.c_str());
#if !defined(YOSYS_DISABLE_SPAWN)
@ -1043,9 +1043,9 @@ struct VizPass : public Pass {
// system()/cmd.exe does not understand single quotes nor
// background tasks on Windows. So we have to pause yosys
// until the viewer exits.
std::string cmd = stringf("%s \"%s\"", viewer_exe.c_str(), out_file.c_str());
std::string cmd = stringf("%s \"%s\"", viewer_exe, out_file);
#else
std::string cmd = stringf("%s '%s' %s", viewer_exe.c_str(), out_file.c_str(), background.c_str());
std::string cmd = stringf("%s '%s' %s", viewer_exe, out_file, background);
#endif
log("Exec: %s\n", cmd.c_str());
if (run_command(cmd) != 0)
@ -1053,9 +1053,9 @@ struct VizPass : public Pass {
} else
if (format.empty()) {
#ifdef __APPLE__
std::string cmd = stringf("ps -fu %d | grep -q '[ ]%s' || xdot '%s' %s", getuid(), dot_file.c_str(), dot_file.c_str(), background.c_str());
std::string cmd = stringf("ps -fu %d | grep -q '[ ]%s' || xdot '%s' %s", getuid(), dot_file, dot_file, background);
#else
std::string cmd = stringf("{ test -f '%s.pid' && fuser -s '%s.pid' 2> /dev/null; } || ( echo $$ >&3; exec xdot '%s'; ) 3> '%s.pid' %s", dot_file.c_str(), dot_file.c_str(), dot_file.c_str(), dot_file.c_str(), background.c_str());
std::string cmd = stringf("{ test -f '%s.pid' && fuser -s '%s.pid' 2> /dev/null; } || ( echo $$ >&3; exec xdot '%s'; ) 3> '%s.pid' %s", dot_file, dot_file, dot_file, dot_file, background);
#endif
log("Exec: %s\n", cmd.c_str());
if (run_command(cmd) != 0)

View file

@ -97,9 +97,9 @@ struct Chunk {
if (len == cell->getPort(port).size())
return port;
else if (len == 1)
return stringf("%s[%d]", port.c_str(), base);
return stringf("%s[%d]", port, base);
else
return stringf("%s[%d:%d]", port.c_str(), base + len - 1, base);
return stringf("%s[%d:%d]", port, base + len - 1, base);
}
SigSpec sample(Cell *cell)

View file

@ -978,8 +978,8 @@ struct XpropWorker
if (wire->port_input == wire->port_output) {
log_warning("Port %s not an input or an output port which is not supported by xprop\n", log_id(wire));
} else if ((options.split_inputs && !options.assume_def_inputs && wire->port_input) || (options.split_outputs && wire->port_output)) {
auto port_d = module->uniquify(stringf("%s_d", port.c_str()));
auto port_x = module->uniquify(stringf("%s_x", port.c_str()));
auto port_d = module->uniquify(stringf("%s_d", port));
auto port_x = module->uniquify(stringf("%s_x", port));
auto wire_d = module->addWire(port_d, GetSize(wire));
auto wire_x = module->addWire(port_x, GetSize(wire));
@ -1031,8 +1031,8 @@ struct XpropWorker
continue;
int index_d = 0;
int index_x = 0;
auto name_d = module->uniquify(stringf("%s_d", wire->name.c_str()), index_d);
auto name_x = module->uniquify(stringf("%s_x", wire->name.c_str()), index_x);
auto name_d = module->uniquify(stringf("%s_d", wire->name), index_d);
auto name_x = module->uniquify(stringf("%s_x", wire->name), index_x);
auto hdlname = wire->get_hdlname_attribute();