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remove test
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read_rtlil << EOT
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module \top
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wire width 4 input 0 \A
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wire output 1 \Y
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cell $lut $0
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parameter \WIDTH 4
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parameter \LUT 16'b0110100110010110
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connect \A \A
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connect \Y \Y
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end
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end
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EOT
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hierarchy -auto-top
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# Prove lut2bmux preserves behavior
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equiv_opt -assert lut2bmux
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# And check the structural rewrite happened
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select -assert-count 0 t:$lut
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select -assert-count 1 t:$bmux r:WIDTH=1 r:S_WIDTH=4 %i
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