3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-08-10 13:10:51 +00:00

Refine macc testcase

This commit is contained in:
Eddie Hung 2019-09-18 12:07:25 -07:00
parent b77cf6ba48
commit c3cba7ab93
2 changed files with 17 additions and 9 deletions

View file

@ -25,4 +25,7 @@ design -load postopt # load the post-opt design (otherwise equiv_opt loads the p
cd macc2 # Constrain all select calls below inside the top module
select -assert-count 1 t:BUFG
select -assert-count 1 t:DSP48E1
select -assert-none t:BUFG t:DSP48E1 %% t:* %D
select -assert-count 1 t:FDRE
select -assert-count 1 t:LUT2
select -assert-count 41 t:LUT3
select -assert-none t:BUFG t:DSP48E1 t:FDRE t:LUT2 t:LUT3 %% t:* %D