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Force $inout.out ports to begin with '$' to indicate internal
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2 changed files with 3 additions and 3 deletions
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@ -424,7 +424,7 @@ struct XAigerWriter
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// inherit existing inout's drivers
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if ((wire->port_input && wire->port_output && !undriven_bits.count(bit))
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|| keep_bits.count(bit)) {
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RTLIL::IdString wire_name = wire->name.str() + "$inout.out";
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RTLIL::IdString wire_name = stringf("$%s$inout.out", wire->name.c_str());
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RTLIL::Wire *new_wire = module->wire(wire_name);
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if (!new_wire)
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new_wire = module->addWire(wire_name, GetSize(wire));
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