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opt_dff: fix infinite loop
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parent
7f7ad87b7b
commit
c33748a9f3
2 changed files with 49 additions and 2 deletions
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@ -61,6 +61,9 @@ struct OptDffWorker
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// Used as a queue.
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std::vector<Cell *> dff_cells;
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std::map<RTLIL::Cell*, patterns_t> ce_cache;
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std::map<RTLIL::Cell*, ctrls_t> srst_cache;
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OptDffWorker(const OptDffOptions &opt, Module *mod) : opt(opt), module(mod), sigmap(mod), initvals(&sigmap, mod) {
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// Gathering two kinds of information here for every sigmapped SigBit:
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//
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@ -630,6 +633,8 @@ struct OptDffWorker
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}
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for (auto &it : groups) {
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if (ff.has_srst && srst_cache[cell] == it.first)
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continue;
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FfData new_ff = ff.slice(it.second);
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new_ff.val_srst = Const();
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for (int i = 0; i < new_ff.width; i++) {
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@ -644,8 +649,10 @@ struct OptDffWorker
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if (new_ff.has_ce)
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new_ff.ce_over_srst = true;
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Cell *new_cell = new_ff.emit();
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if (new_cell)
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if (new_cell) {
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dff_cells.push_back(new_cell);
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srst_cache[new_cell] = it.first;
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}
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log("Adding SRST signal on %s (%s) from module %s (D = %s, Q = %s, rval = %s).\n",
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log_id(cell), log_id(cell->type), log_id(module), log_signal(new_ff.sig_d), log_signal(new_ff.sig_q), log_signal(new_ff.val_srst));
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}
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@ -699,6 +706,8 @@ struct OptDffWorker
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}
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for (auto &it : groups) {
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if (ff.has_ce && ce_cache[cell] == it.first.first)
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continue;
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FfData new_ff = ff.slice(it.second);
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ctrl_t en = make_patterns_logic(it.first.first, it.first.second, ff.is_fine);
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@ -707,8 +716,10 @@ struct OptDffWorker
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new_ff.pol_ce = en.second;
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new_ff.ce_over_srst = false;
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Cell *new_cell = new_ff.emit();
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if (new_cell)
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if (new_cell){
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dff_cells.push_back(new_cell);
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ce_cache[new_cell] = it.first.first;
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}
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log("Adding EN signal on %s (%s) from module %s (D = %s, Q = %s).\n",
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log_id(cell), log_id(cell->type), log_id(module), log_signal(new_ff.sig_d), log_signal(new_ff.sig_q));
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}
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