mirror of
https://github.com/YosysHQ/yosys
synced 2025-06-14 09:56:16 +00:00
add simple test case for wand/wor
This commit is contained in:
parent
fd003e0e97
commit
c2caf85f7c
1 changed files with 35 additions and 0 deletions
35
tests/various/wandwor.v
Normal file
35
tests/various/wandwor.v
Normal file
|
@ -0,0 +1,35 @@
|
||||||
|
module a(Q);
|
||||||
|
output wire Q;
|
||||||
|
|
||||||
|
assign Q = 0;
|
||||||
|
endmodule
|
||||||
|
|
||||||
|
module b(D);
|
||||||
|
input wire D;
|
||||||
|
endmodule
|
||||||
|
|
||||||
|
module c;
|
||||||
|
wor D;
|
||||||
|
assign D = 1;
|
||||||
|
assign D = 0;
|
||||||
|
assign D = 1;
|
||||||
|
assign D = 0;
|
||||||
|
|
||||||
|
|
||||||
|
wand E;
|
||||||
|
wire E_wire = E;
|
||||||
|
|
||||||
|
genvar i;
|
||||||
|
for (i = 0; i < 3; i = i + 1)
|
||||||
|
begin :genloop
|
||||||
|
a a_inst (
|
||||||
|
.Q(E)
|
||||||
|
);
|
||||||
|
|
||||||
|
b b_inst (
|
||||||
|
.D(E_wire)
|
||||||
|
);
|
||||||
|
end
|
||||||
|
|
||||||
|
endmodule
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue