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anlogic: support BRAM mapping

Anlogic FPGAs all have two kinds of BRAMs, one is 9bit*1K when being
true dual port (or 18bit*512 when simple dual port), the other is
16bit*2K.

Supports mapping of these two kinds of BRAMs. 9Kbit BRAM in SDP mode and
32Kbit BRAM with 8bit width are not support yet.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
This commit is contained in:
Icenowy Zheng 2021-12-17 20:25:32 +08:00
parent 60c3ea367c
commit c2b7ad3b28
8 changed files with 283 additions and 2 deletions

View file

@ -63,6 +63,9 @@ struct SynthAnlogicPass : public ScriptPass
log(" -nolutram\n");
log(" do not use EG_LOGIC_DRAM16X4 cells in output netlist\n");
log("\n");
log(" -nobram\n");
log(" do not use EG_PHY_BRAM or EG_PHY_BRAM32K cells in output netlist\n");
log("\n");
log("\n");
log("The following commands are executed by this synthesis command:\n");
help_script();
@ -70,7 +73,7 @@ struct SynthAnlogicPass : public ScriptPass
}
string top_opt, edif_file, json_file;
bool flatten, retime, nolutram;
bool flatten, retime, nolutram, nobram;
void clear_flags() override
{
@ -80,6 +83,7 @@ struct SynthAnlogicPass : public ScriptPass
flatten = true;
retime = false;
nolutram = false;
nobram = false;
}
void execute(std::vector<std::string> args, RTLIL::Design *design) override
@ -118,6 +122,10 @@ struct SynthAnlogicPass : public ScriptPass
nolutram = true;
continue;
}
if (args[argidx] == "-nobram") {
nobram = true;
continue;
}
if (args[argidx] == "-retime") {
retime = true;
continue;
@ -158,6 +166,14 @@ struct SynthAnlogicPass : public ScriptPass
run("synth -run coarse");
}
if (!nobram && check_label("map_bram", "(skip if -nobram)"))
{
run("memory_bram -rules +/anlogic/brams.txt");
run("techmap -map +/anlogic/brams_map.v");
run("setundef -zero -params t:EG_PHY_BRAM");
run("setundef -zero -params t:EG_PHY_BRAM32K");
}
if (!nolutram && check_label("map_lutram", "(skip if -nolutram)"))
{
run("memory_bram -rules +/anlogic/lutrams.txt");