mirror of
https://github.com/YosysHQ/yosys
synced 2025-12-11 14:16:24 +00:00
fmt: add tests for Verilog round trip of format expressions.
This commit is contained in:
parent
67052f62ec
commit
c285880684
5 changed files with 95 additions and 2 deletions
3
tests/fmt/.gitignore
vendored
3
tests/fmt/.gitignore
vendored
|
|
@ -1,2 +1,3 @@
|
|||
*.log
|
||||
iverilog-initial_display*
|
||||
iverilog-*
|
||||
yosys-*
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue