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Allow adders/accumulators with 33 bits using CO output

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This commit is contained in:
Eddie Hung 2019-07-26 10:15:36 -07:00
parent c39ccc65e9
commit c1a05f4557
1 changed files with 8 additions and 3 deletions
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11
passes/pmgen/ice40_dsp.cc
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@ -56,8 +56,8 @@ void create_ice40_dsp(ice40_dsp_pm &pm)
return; return;
} }
if (GetSize(st.sigO) > 32) { if (GetSize(st.sigO) > 33) {
log(" accumulator (%s) is too large (%d > 32).\n", log_signal(st.sigO), GetSize(st.sigO)); log(" adder/accumulator (%s) is too large (%d > 33).\n", log_signal(st.sigO), GetSize(st.sigO));
return; return;
} }
@ -137,7 +137,6 @@ void create_ice40_dsp(ice40_dsp_pm &pm)
cell->setPort("\\SIGNEXTOUT", pm.module->addWire(NEW_ID)); cell->setPort("\\SIGNEXTOUT", pm.module->addWire(NEW_ID));
cell->setPort("\\CI", State::Sx); cell->setPort("\\CI", State::Sx);
cell->setPort("\\CO", pm.module->addWire(NEW_ID));
cell->setPort("\\ACCUMCI", State::Sx); cell->setPort("\\ACCUMCI", State::Sx);
cell->setPort("\\ACCUMCO", pm.module->addWire(NEW_ID)); cell->setPort("\\ACCUMCO", pm.module->addWire(NEW_ID));
@ -145,6 +144,12 @@ void create_ice40_dsp(ice40_dsp_pm &pm)
// SB_MAC16 Output Interface // SB_MAC16 Output Interface
SigSpec O = st.sigO; SigSpec O = st.sigO;
if (GetSize(O) == 33)
cell->setPort("\\CO", st.sigO[32]);
else {
log_assert(GetSize(O) <= 32);
cell->setPort("\\CO", pm.module->addWire(NEW_ID));
}
if (GetSize(O) < 32) if (GetSize(O) < 32)
O.append(pm.module->addWire(NEW_ID, 32-GetSize(O))); O.append(pm.module->addWire(NEW_ID, 32-GetSize(O)));