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	Merge pull request #812 from ucb-bar/arrayhierarchyfixes
Define basic_cell_type() function and use it to derive the cell type …
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						c118f9a377
					
				
					 3 changed files with 108 additions and 11 deletions
				
			
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			@ -140,6 +140,23 @@ void generate(RTLIL::Design *design, const std::vector<std::string> &celltypes,
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	}
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}
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// Return the "basic" type for an array item.
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std::string basic_cell_type(const std::string celltype, int pos[3] = nullptr) {
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	std::string basicType = celltype;
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	if (celltype.substr(0, 7) == "$array:") {
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		int pos_idx = celltype.find_first_of(':');
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		int pos_num = celltype.find_first_of(':', pos_idx + 1);
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		int pos_type = celltype.find_first_of(':', pos_num + 1);
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		basicType = celltype.substr(pos_type + 1);
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		if (pos != nullptr) {
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			pos[0] = pos_idx;
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			pos[1] = pos_num;
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			pos[2] = pos_type;
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		}
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	}
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	return basicType;
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}
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bool expand_module(RTLIL::Design *design, RTLIL::Module *module, bool flag_check, bool flag_simcheck, std::vector<std::string> &libdirs)
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{
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	bool did_something = false;
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			@ -178,9 +195,11 @@ bool expand_module(RTLIL::Design *design, RTLIL::Module *module, bool flag_check
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		std::vector<RTLIL::SigSpec> connections_to_add_signal;
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		if (cell->type.substr(0, 7) == "$array:") {
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			int pos_idx = cell->type.str().find_first_of(':');
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			int pos_num = cell->type.str().find_first_of(':', pos_idx + 1);
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			int pos_type = cell->type.str().find_first_of(':', pos_num + 1);
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			int pos[3];
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			basic_cell_type(cell->type.str(), pos);
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			int pos_idx = pos[0];
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			int pos_num = pos[1];
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			int pos_type = pos[2];
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			int idx = atoi(cell->type.str().substr(pos_idx + 1, pos_num).c_str());
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			int num = atoi(cell->type.str().substr(pos_num + 1, pos_type).c_str());
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			array_cells[cell] = std::pair<int, int>(idx, num);
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			@ -439,10 +458,7 @@ void hierarchy_worker(RTLIL::Design *design, std::set<RTLIL::Module*, IdString::
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	for (auto cell : mod->cells()) {
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		std::string celltype = cell->type.str();
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		if (celltype.substr(0, 7) == "$array:") {
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			int pos_idx = celltype.find_first_of(':');
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			int pos_num = celltype.find_first_of(':', pos_idx + 1);
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			int pos_type = celltype.find_first_of(':', pos_num + 1);
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			celltype = celltype.substr(pos_type + 1);
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			celltype = basic_cell_type(celltype);
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		}
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		if (design->module(celltype))
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			hierarchy_worker(design, used, design->module(celltype), indent+4);
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			@ -502,9 +518,23 @@ int find_top_mod_score(Design *design, Module *module, dict<Module*, int> &db)
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	if (db.count(module) == 0) {
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		int score = 0;
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		db[module] = 0;
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		for (auto cell : module->cells())
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			if (design->module(cell->type))
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				score = max(score, find_top_mod_score(design, design->module(cell->type), db) + 1);
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		for (auto cell : module->cells()) {
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			std::string celltype = cell->type.str();
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			// Is this an array instance
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			if (celltype.substr(0, 7) == "$array:") {
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				celltype = basic_cell_type(celltype);
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			}
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			// Is this cell a module instance?
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			auto instModule = design->module(celltype);
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			// If there is no instance for this, issue a warning.
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			if (instModule == NULL) {
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				//  but only if we're sure it is a reference to a module.
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				if (celltype[0] != '$')
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					log_warning("find_top_mod_score: no instance for %s.%s\n", celltype.c_str(), cell->name.c_str());
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			} else {
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				score = max(score, find_top_mod_score(design, instModule, db) + 1);
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			}
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		}
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		db[module] = score;
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	}
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	return db.at(module);
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										59
									
								
								tests/various/hierarchy.sh
									
										
									
									
									
										Normal file
									
								
							
							
						
						
									
										59
									
								
								tests/various/hierarchy.sh
									
										
									
									
									
										Normal file
									
								
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			@ -0,0 +1,59 @@
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#!/usr/bin/env bash
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# Simple test of hierarchy -auto-top.
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set -e
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echo -n "  TOP first - "
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../../yosys -s - <<- EOY | grep "Automatically selected TOP as design top module"
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  read_verilog << EOV
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    module TOP(a, y);
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      input a;
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      output [31:0] y;
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      aoi12 p [31:0] (a, y);
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    endmodule
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    module aoi12(a, y);
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      input a;
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      output y;
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      assign y = ~a;
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    endmodule
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  EOV
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  hierarchy -auto-top
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EOY
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echo -n "  TOP last - "
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../../yosys -s - <<- EOY | grep "Automatically selected TOP as design top module"
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  read_verilog << EOV
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    module aoi12(a, y);
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      input a;
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      output y;
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      assign y = ~a;
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    endmodule
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    module TOP(a, y);
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      input a;
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      output [31:0] y;
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      aoi12 foo (a, y);
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    endmodule
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  EOV
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  hierarchy -auto-top
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EOY
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echo -n "  no explicit top - "
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../../yosys -s - <<- EOY | grep "Automatically selected noTop as design top module."
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  read_verilog << EOV
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    module aoi12(a, y);
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      input a;
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      output y;
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      assign y = ~a;
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    endmodule
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    module noTop(a, y);
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      input a;
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      output [31:0] y;
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    endmodule
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  EOV
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  hierarchy -auto-top
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EOY
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			@ -1,6 +1,14 @@
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#!/bin/bash
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#!/usr/bin/env bash
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set -e
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for x in *.ys; do
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	echo "Running $x.."
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	../../yosys -ql ${x%.ys}.log $x
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done
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# Run any .sh files in this directory (with the exception of the file - run-test.sh
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shell_tests=$(echo *.sh | sed -e 's/run-test.sh//')
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if [ "$shell_tests" ]; then
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    for s in $shell_tests; do
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        echo "Running $s.."
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        bash $s
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    done
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fi
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