mirror of
				https://github.com/YosysHQ/yosys
				synced 2025-10-31 03:32:29 +00:00 
			
		
		
		
	Ohmilord this wasn't added all this time!?!
This commit is contained in:
		
							parent
							
								
									2ed2e9c3e8
								
							
						
					
					
						commit
						c0f54d3fd5
					
				
					 1 changed files with 29 additions and 0 deletions
				
			
		
							
								
								
									
										29
									
								
								techlibs/ice40/abc_model.v
									
										
									
									
									
										Normal file
									
								
							
							
						
						
									
										29
									
								
								techlibs/ice40/abc_model.v
									
										
									
									
									
										Normal file
									
								
							|  | @ -0,0 +1,29 @@ | ||||||
|  | (* abc9_box_id = 1, lib_whitebox *) | ||||||
|  | module \$__ICE40_CARRY_WRAPPER ( | ||||||
|  | 	(* abc_carry *) | ||||||
|  | 	output CO, | ||||||
|  | 	output O, | ||||||
|  | 	input A, B, | ||||||
|  | 	(* abc_carry *) | ||||||
|  | 	input CI, | ||||||
|  | 	input I0, I3 | ||||||
|  | ); | ||||||
|  | 	parameter LUT = 0; | ||||||
|  | 	SB_CARRY carry ( | ||||||
|  | 		.I0(A), | ||||||
|  | 		.I1(B), | ||||||
|  | 		.CI(CI), | ||||||
|  | 		.CO(CO) | ||||||
|  | 	); | ||||||
|  | 	SB_LUT4 #( | ||||||
|  | 		.LUT_INIT(LUT) | ||||||
|  | 	) adder ( | ||||||
|  | 		.I0(I0), | ||||||
|  | 		.I1(A), | ||||||
|  | 		.I2(B), | ||||||
|  | 		.I3(I3), | ||||||
|  | 		.O(O) | ||||||
|  | 	); | ||||||
|  | endmodule | ||||||
|  | 
 | ||||||
|  | 
 | ||||||
		Loading…
	
	Add table
		Add a link
		
	
		Reference in a new issue