mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-13 04:28:18 +00:00
Code Activity

synth_ice40: -abc2 to always use abc even if -abc9

Browse source
This commit is contained in:
Eddie Hung 2020-01-12 11:26:05 -08:00
parent 58ab9f6021
commit c0b55deb0b
1 changed files with 10 additions and 10 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

20
techlibs/ice40/synth_ice40.cc
View file

@ -102,8 +102,8 @@ struct SynthIce40Pass : public ScriptPass
log("\n"); log("\n");
} }
string top_opt, blif_file, edif_file, json_file, abc, device_opt; string top_opt, blif_file, edif_file, json_file, device_opt;
bool nocarry, nodffe, nobram, dsp, flatten, retime, noabc, abc2, vpr; bool nocarry, nodffe, nobram, dsp, flatten, retime, noabc, abc2, vpr, abc9;
int min_ce_use; int min_ce_use;
void clear_flags() YS_OVERRIDE void clear_flags() YS_OVERRIDE
@ -122,7 +122,7 @@ struct SynthIce40Pass : public ScriptPass
noabc = false; noabc = false;
abc2 = false; abc2 = false;
vpr = false; vpr = false;
abc = "abc"; abc9 = false;
device_opt = "hx"; device_opt = "hx";
} }
@ -207,7 +207,7 @@ struct SynthIce40Pass : public ScriptPass
continue; continue;
} }
if (args[argidx] == "-abc9") { if (args[argidx] == "-abc9") {
abc = "abc9"; abc9 = true;
continue; continue;
} }
if (args[argidx] == "-device" && argidx+1 < args.size()) { if (args[argidx] == "-device" && argidx+1 < args.size()) {
@ -223,7 +223,7 @@ struct SynthIce40Pass : public ScriptPass
if (device_opt != "hx" && device_opt != "lp" && device_opt !="u") if (device_opt != "hx" && device_opt != "lp" && device_opt !="u")
log_cmd_error("Invalid or no device specified: '%s'\n", device_opt.c_str()); log_cmd_error("Invalid or no device specified: '%s'\n", device_opt.c_str());
if (abc == "abc9" && retime) if (abc9 && retime)
log_cmd_error("-retime option not currently compatible with -abc9!\n"); log_cmd_error("-retime option not currently compatible with -abc9!\n");
log_header(design, "Executing SYNTH_ICE40 pass.\n"); log_header(design, "Executing SYNTH_ICE40 pass.\n");
@ -316,7 +316,7 @@ struct SynthIce40Pass : public ScriptPass
run("techmap -map +/techmap.v -map +/ice40/arith_map.v"); run("techmap -map +/techmap.v -map +/ice40/arith_map.v");
} }
if (retime || help_mode) if (retime || help_mode)
run(abc + " -dff -D 1", "(only if -retime)"); run("abc -dff -D 1", "(only if -retime)");
run("ice40_opt"); run("ice40_opt");
} }
@ -340,7 +340,7 @@ struct SynthIce40Pass : public ScriptPass
if (check_label("map_luts")) if (check_label("map_luts"))
{ {
if (abc2 || help_mode) { if (abc2 || help_mode) {
run(abc, " (only if -abc2)"); run("abc", " (only if -abc2)");
run("ice40_opt", "(only if -abc2)"); run("ice40_opt", "(only if -abc2)");
} }
run("techmap -map +/ice40/latches_map.v"); run("techmap -map +/ice40/latches_map.v");
@ -349,7 +349,7 @@ struct SynthIce40Pass : public ScriptPass
run("techmap -map +/gate2lut.v -D LUT_WIDTH=4", "(only if -noabc)"); run("techmap -map +/gate2lut.v -D LUT_WIDTH=4", "(only if -noabc)");
} }
if (!noabc) { if (!noabc) {
if (abc == "abc9") { if (abc9) {
run("read_verilog -icells -lib +/ice40/abc9_model.v"); run("read_verilog -icells -lib +/ice40/abc9_model.v");
int wire_delay; int wire_delay;
if (device_opt == "lp") if (device_opt == "lp")
@ -358,10 +358,10 @@ struct SynthIce40Pass : public ScriptPass
wire_delay = 750; wire_delay = 750;
else else
wire_delay = 250; wire_delay = 250;
run(abc + stringf(" -W %d -lut +/ice40/abc9_%s.lut -box +/ice40/abc9_%s.box", wire_delay, device_opt.c_str(), device_opt.c_str()), "(skip if -noabc)"); run(stringf("abc9 -W %d -lut +/ice40/abc9_%s.lut -box +/ice40/abc9_%s.box", wire_delay, device_opt.c_str(), device_opt.c_str()));
} }
else else
run(abc + " -dress -lut 4", "(skip if -noabc)"); run("abc -dress -lut 4", "(skip if -noabc)");
} }
run("ice40_wrapcarry -unwrap"); run("ice40_wrapcarry -unwrap");
run("techmap -D NO_LUT -map +/ice40/cells_map.v"); run("techmap -D NO_LUT -map +/ice40/cells_map.v");