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Removed RTLIL::SigSpec::optimize()

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This commit is contained in:
Clifford Wolf 2014-07-23 20:32:28 +02:00
parent 8fd8e4a468
commit c094c53de8
24 changed files with 15 additions and 181 deletions
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1
passes/cmds/setundef.cc
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@ -144,7 +144,6 @@ struct SetundefPass : public Pass {
RTLIL::SigSpec bits;
for (int i = 0; i < c.width; i++)
bits.append(worker.next_bit());
bits.optimize();
module->connections.push_back(RTLIL::SigSig(c, bits));
}
}

3
passes/cmds/show.cc
View file

@ -171,8 +171,6 @@ struct ShowWorker
std::string gen_signode_simple(RTLIL::SigSpec sig, bool range_check = true)
{
sig.optimize();
if (sig.chunks().size() == 0) {
fprintf(f, "v%d [ label=\"\" ];\n", single_idx_count);
return stringf("v%d", single_idx_count++);
@ -199,7 +197,6 @@ struct ShowWorker
if (net.empty())
{
std::string label_string;
sig.optimize();
int pos = sig.size()-1;
int idx = single_idx_count++;
for (int i = int(sig.chunks().size())-1; i >= 0; i--) {

2
passes/cmds/splice.cc
View file

@ -82,7 +82,6 @@ struct SpliceWorker
module->add(cell);
}
new_sig.optimize();
sliced_signals_cache[sig] = new_sig;
return new_sig;
@ -143,7 +142,6 @@ struct SpliceWorker
module->add(cell);
}
new_sig.optimize();
spliced_signals_cache[sig] = new_sig;
log(" Created spliced signal: %s -> %s\n", log_signal(sig), log_signal(new_sig));

2
passes/cmds/splitnets.cc
View file

@ -141,7 +141,7 @@ struct SplitnetsPass : public Pass {
if (!ct.cell_output(c.second->type, p.first))
continue;
RTLIL::SigSpec sig = p.second.optimized();
RTLIL::SigSpec sig = p.second;
for (auto &chunk : sig.chunks()) {
if (chunk.wire == NULL)
continue;