diff --git a/passes/cmds/stubs.sdc b/passes/cmds/stubs.sdc
index 8659ca392..ea1600139 100644
--- a/passes/cmds/stubs.sdc
+++ b/passes/cmds/stubs.sdc
@@ -107,3 +107,128 @@ stub set_system_jitter
 stub set_units
 stub startgroup
 stub update_macro
+
+# OpenSTA
+stub source_
+stub write_sdc
+stub current_instance
+stub set_hierarchy_separator
+stub check_path_divider
+stub set_units
+stub check_unit
+stub unit_prefix_scale
+stub check_unit_scale
+stub all_clocks
+stub all_inputs
+stub all_outputs
+stub all_registers
+stub current_design
+stub filter_objs
+stub check_nocase_flag
+stub find_liberty_libraries_matching
+stub create_clock
+stub delete_clock
+stub create_generated_clock
+stub delete_generated_clock
+stub remove_gclk_cmd
+stub group_path
+stub check_exception_pins
+stub set_clock_gating_check
+stub set_clock_gating_check1
+stub set_clock_groups
+stub unset_clock_groups
+stub unset_clk_groups_cmd
+stub set_clock_latency
+stub unset_clock_latency
+stub unset_clk_latency_cmd
+stub set_sense
+stub set_clock_sense
+stub set_clock_sense_cmd1
+stub set_clock_transition
+stub unset_clock_transition
+stub set_clock_uncertainty
+stub unset_clock_uncertainty
+stub unset_clk_uncertainty_cmd
+stub set_data_check
+stub unset_data_check
+stub unset_data_checks_cmd
+stub set_disable_timing
+stub set_disable_timing_instance
+stub parse_disable_inst_ports
+stub port_members
+stub set_disable_timing_cell
+stub parse_disable_cell_ports
+stub unset_disable_timing
+stub unset_disable_cmd
+stub unset_disable_timing_cell
+stub unset_disable_timing_instance
+stub set_false_path
+stub set_ideal_latency
+stub set_ideal_network
+stub set_ideal_transition
+stub set_input_delay
+stub set_port_delay
+stub unset_input_delay
+stub set_max_delay
+stub set_path_delay
+stub set_max_time_borrow
+stub set_min_delay
+stub set_min_pulse_width
+stub set_multicycle_path
+stub unset_path_exceptions
+stub unset_path_exceptions_cmd
+stub set_output_delay
+stub unset_output_delay
+stub unset_port_delay
+stub set_propagated_clock
+stub unset_propagated_clock
+stub set_case_analysis
+stub unset_case_analysis
+stub set_drive
+stub set_driving_cell
+stub port_direction_any_output
+stub set_fanout_load
+stub set_input_transition
+stub set_load
+stub set_logic_dc
+stub set_logic_value
+stub set_logic_one
+stub set_logic_zero
+stub set_max_area
+stub set_max_capacitance
+stub set_capacitance_limit
+stub set_max_fanout
+stub set_fanout_limit
+stub set_max_transition
+stub set_port_fanout_number
+stub set_resistance
+stub set_timing_derate
+stub unset_timing_derate
+stub parse_from_arg
+stub parse_thrus_arg
+stub parse_to_arg
+stub parse_to_arg1
+stub delete_from_thrus_to
+stub parse_comment_key
+stub set_min_capacitance
+stub set_operating_conditions
+stub parse_op_cond
+stub parse_op_cond_analysis_type
+stub set_wire_load_min_block_size
+stub set_wire_load_mode
+stub set_wire_load_model
+stub set_wire_load_selection_group
+stub set_voltage
+stub create_voltage_area
+stub set_level_shifter_strategy
+stub set_level_shifter_threshold
+stub set_max_dynamic_power
+stub set_max_leakage_power
+stub define_corners
+stub set_pvt
+stub set_pvt_min_max
+stub default_operating_conditions
+stub cell_regexp
+stub cell_regexp_hsc
+stub port_regexp
+stub port_regexp_hsc
\ No newline at end of file