From bf84861fc2abeb877b770b33206ff2ee61d11552 Mon Sep 17 00:00:00 2001
From: Charlotte <charlotte@lottia.net>
Date: Fri, 11 Aug 2023 15:52:05 +1000
Subject: [PATCH] proc_clean: only consider fully-defined case operands.

---
 passes/proc/proc_clean.cc      |  2 +-
 tests/proc/clean_undef_case.ys | 22 ++++++++++++++++++++++
 2 files changed, 23 insertions(+), 1 deletion(-)
 create mode 100644 tests/proc/clean_undef_case.ys

diff --git a/passes/proc/proc_clean.cc b/passes/proc/proc_clean.cc
index 45872907b..6ce2f8cb0 100644
--- a/passes/proc/proc_clean.cc
+++ b/passes/proc/proc_clean.cc
@@ -41,7 +41,7 @@ void proc_clean_switch(RTLIL::SwitchRule *sw, RTLIL::CaseRule *parent, bool &did
 				break;
 			for (int j = 0; j < int(cs->compare.size()); j++) {
 				RTLIL::SigSpec &val = cs->compare[j];
-				if (!val.is_fully_const())
+				if (!val.is_fully_def())
 					continue;
 				if (val == sw->signal) {
 					cs->compare.clear();
diff --git a/tests/proc/clean_undef_case.ys b/tests/proc/clean_undef_case.ys
new file mode 100644
index 000000000..3c29c93bc
--- /dev/null
+++ b/tests/proc/clean_undef_case.ys
@@ -0,0 +1,22 @@
+read_rtlil <<EOT
+
+module \m
+  wire width 1 \w
+  process $p
+    switch 3'001
+      case 3'--1
+        assign \w 3'001
+      case 3'-1-
+        assign \w 3'010
+      case 3'1--
+        assign \w 3'100
+    end
+  end
+end
+
+EOT
+
+proc_clean  # Bug: removes the cases.
+proc_clean  # Removes the now-empty switch and its containing process.
+
+select -assert-count 1 */p:*