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Merge 4508676e67 into a80462f27f

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Emil J 2025-10-08 13:49:18 -07:00 • committed by GitHub
commit bf691b6c4d
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8 changed files with 14 additions and 12 deletions
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7
kernel/io.cc
View file

@ -384,6 +384,13 @@ std::string escape_filename_spaces(const std::string& filename)
return out;
}
void append_globbed(std::vector<std::string>& paths, std::string pattern)
{
rewrite_filename(pattern);
std::vector<std::string> globbed = glob_filename(pattern);
copy(globbed.begin(), globbed.end(), back_inserter(paths));
}
void format_emit_unescaped(std::string &result, std::string_view fmt)
{
result.reserve(result.size() + fmt.size());

1
kernel/io.h
View file

@ -469,6 +469,7 @@ bool is_absolute_path(std::string filename);
void remove_directory(std::string dirname);
bool create_directory(const std::string& dirname);
std::string escape_filename_spaces(const std::string& filename);
void append_globbed(std::vector<std::string>& paths, std::string pattern);
YOSYS_NAMESPACE_END

4
passes/techmap/clockgate.cc
View file

@ -290,9 +290,7 @@ struct ClockgatePass : public Pass {
continue;
}
if (args[argidx] == "-liberty" && argidx+1 < args.size()) {
std::string liberty_file = args[++argidx];
rewrite_filename(liberty_file);
liberty_files.push_back(liberty_file);
append_globbed(liberty_files, args[++argidx]);
continue;
}
if (args[argidx] == "-dont_use" && argidx+1 < args.size()) {

4
passes/techmap/dfflibmap.cc
View file

@ -609,9 +609,7 @@ struct DfflibmapPass : public Pass {
{
std::string arg = args[argidx];
if (arg == "-liberty" && argidx+1 < args.size()) {
std::string liberty_file = args[++argidx];
rewrite_filename(liberty_file);
liberty_files.push_back(liberty_file);
append_globbed(liberty_files, args[++argidx]);
continue;
}
if (arg == "-prepare") {

4
passes/techmap/libcache.cc
View file

@ -96,9 +96,7 @@
quiet = true;
continue;
}
std::string fname = args[argidx];
rewrite_filename(fname);
paths.push_back(fname);
append_globbed(paths, args[argidx]);
break;
}
int modes = enable + disable + purge + list + verbose + quiet;

2
tests/liberty/libcache.ys
View file

@ -1,5 +1,5 @@
libcache -verbose
libcache -enable busdef.lib
libcache -enable bus*f.lib
logger -expect log "Caching is disabled by default." 1
logger -expect log "Caching is enabled for `busdef.lib'." 1

2
tests/techmap/clockgate.ys
View file

@ -194,7 +194,7 @@ select -assert-count 1 t:\\pdk_icg
#------------------------------------------------------------------------------
design -load before
clockgate -liberty clockgate.lib
clockgate -liberty c*ckgate.lib
# rising edge ICGs
select -module dffe_00 -assert-count 0 t:\\pos_small

2
tests/techmap/dfflibmap.ys
View file

@ -23,7 +23,7 @@ read_liberty -lib dfflibmap.lib
equiv_opt -map dfflibmap-sim.v -assert -multiclock dfflibmap -liberty dfflibmap.lib
equiv_opt -map dfflibmap-sim.v -assert -multiclock dfflibmap -prepare -liberty dfflibmap.lib
dfflibmap -prepare -liberty dfflibmap.lib
dfflibmap -prepare -liberty dffl*bmap.lib
equiv_opt -map dfflibmap-sim.v -assert -multiclock dfflibmap -map-only -liberty dfflibmap.lib
design -load orig