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Fixed undef extend for bitwise binary ops (bugs in simplemap and satgen)
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2 changed files with 10 additions and 13 deletions
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@ -77,11 +77,11 @@ static void simplemap_bitop(RTLIL::Module *module, RTLIL::Cell *cell)
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int width = cell->parameters.at("\\Y_WIDTH").as_int();
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RTLIL::SigSpec sig_a = cell->connections.at("\\A");
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sig_a.extend(width, cell->parameters.at("\\A_SIGNED").as_bool());
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sig_a.extend_u0(width, cell->parameters.at("\\A_SIGNED").as_bool());
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sig_a.expand();
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RTLIL::SigSpec sig_b = cell->connections.at("\\B");
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sig_b.extend(width, cell->parameters.at("\\B_SIGNED").as_bool());
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sig_b.extend_u0(width, cell->parameters.at("\\B_SIGNED").as_bool());
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sig_b.expand();
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RTLIL::SigSpec sig_y = cell->connections.at("\\Y");
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