mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-11-03 21:09:12 +00:00
Code Activity

Fix compile on WASI platform

Browse source
This commit is contained in:
Jason Xu 2025-03-07 20:20:27 -05:00
parent ac31bad656
commit bf1eab565b
1 changed files with 8 additions and 4 deletions
Download patch file Download diff file Expand all files Collapse all files

12
frontends/verilog/verilog_frontend.cc
View file

@ -26,7 +26,9 @@
*
*/
#if !defined(__wasm)
#include <filesystem>
#endif
#include "verilog_frontend.h"
#include "preproc.h"
@ -674,6 +676,8 @@ struct VerilogDefines : public Pass {
}
} VerilogDefines;
#if !defined(__wasm)
static void parse_file_list(const std::string &file_list_path, RTLIL::Design *design, bool relative_to_file_list_path)
{
std::ifstream flist(file_list_path);
@ -721,12 +725,10 @@ struct VerilogFileList : public Pass {
log("Parse a Verilog file list, and pass the list of Verilog files to read_verilog command.\n");
log("\n");
log(" -F file_list_path\n");
log(" File list file contains list of Verilog files to be parsed, any\n");
log(" path is treated relative to the file list file\n");
log(" File list file contains list of Verilog files to be parsed, any path is treated relative to the file list file\n");
log("\n");
log(" -f file_list_path\n");
log(" File list file contains list of Verilog files to be parsed, any\n");
log(" path is treated relative to current working directroy\n");
log(" File list file contains list of Verilog files to be parsed, any path is treated relative to current working directroy\n");
log("\n");
}
@ -752,6 +754,8 @@ struct VerilogFileList : public Pass {
}
} VerilogFilelist;
#endif
YOSYS_NAMESPACE_END
// the yyerror function used by bison to report parser errors