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Use abc_{map,unmap,model}.v

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This commit is contained in:
Eddie Hung 2019-08-20 12:39:11 -07:00
parent c4d4c6db3f
commit be9e4f1b67
8 changed files with 334 additions and 141 deletions
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2
techlibs/xilinx/cells_map.v
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@ -331,7 +331,6 @@ module \$_MUX16_ (A, B, C, D, E, F, G, H, I, J, K, L, M, N, O, P, S, T, U, V, Y)
endmodule
`endif
`ifndef _ABC
module \$__XILINX_MUXF78 (O, I0, I1, I2, I3, S0, S1);
output O;
input I0, I1, I2, I3, S0, S1;
@ -364,4 +363,3 @@ module \$__XILINX_MUXF78 (O, I0, I1, I2, I3, S0, S1);
else
MUXF8 mux8 (.I0(T0), .I1(T1), .S(S1), .O(O));
endmodule
`endif