mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-08-05 02:40:25 +00:00
Code Activity

gowin: split cells_xtra by family

Browse source
This commit is contained in:
Pepijn de Vos 2024-11-26 15:42:22 +01:00
parent 98b4affc4a
commit be836f4af3
7 changed files with 6324 additions and 6308 deletions
Download patch file Download diff file Expand all files Collapse all files

13
techlibs/gowin/synth_gowin.cc
View file

@ -86,17 +86,22 @@ struct SynthGowinPass : public ScriptPass
log(" read/write collision\" (same result as setting the no_rw_check\n");
log(" attribute on all memories).\n");
log("\n");
log(" -family <family>\n");
log(" sets the gowin family to the specified value. The default is 'gw1n'.\n");
log(" The following families are supported:\n");
log(" 'gw1n', 'gw2a', 'gw5a'.\n");
log("\n");
log("The following commands are executed by this synthesis command:\n");
help_script();
log("\n");
}
string top_opt, vout_file, json_file;
string top_opt, vout_file, json_file, family;
bool retime, nobram, nolutram, flatten, nodffe, nowidelut, abc9, noiopads, noalu, no_rw_check;
void clear_flags() override
{
family = "gw1n";
top_opt = "-auto-top";
vout_file = "";
json_file = "";
@ -132,6 +137,10 @@ struct SynthGowinPass : public ScriptPass
json_file = args[++argidx];
continue;
}
if (args[argidx] == "-family" && argidx+1 < args.size()) {
family = args[++argidx];
continue;
}
if (args[argidx] == "-run" && argidx+1 < args.size()) {
size_t pos = args[argidx+1].find(':');
if (pos == std::string::npos)
@ -210,7 +219,7 @@ struct SynthGowinPass : public ScriptPass
if (check_label("begin"))
{
run("read_verilog -specify -lib +/gowin/cells_sim.v");
run("read_verilog -specify -lib +/gowin/cells_xtra.v");
run(stringf("read_verilog -specify -lib +/gowin/cells_xtra_%s.v", help_mode ? "<family>" : family.c_str()));
run(stringf("hierarchy -check %s", help_mode ? "-top <top>" : top_opt.c_str()));
}