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Add left and right bound properties to wire. Add test. Fix printing

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for signed attributes

Co-authored-by: N. Engelhardt <nak@yosyshq.com>
Co-authored-by: Roland Coeurjoly <rolandcoeurjoly@gmail.com>
This commit is contained in:
Roland Coeurjoly 2024-08-21 16:21:29 +02:00
parent 27c1432253
commit bdc43c6592
6 changed files with 40 additions and 3 deletions
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2
kernel/rtlil.cc
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@ -213,7 +213,7 @@ RTLIL::Const::Const(const std::string &str)
}
}
RTLIL::Const::Const(int val, int width)
RTLIL::Const::Const(long long val, int width)
{
flags = RTLIL::CONST_FLAG_NONE;
bits.reserve(width);

2
kernel/rtlil.h
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@ -662,7 +662,7 @@ struct RTLIL::Const
Const() : flags(RTLIL::CONST_FLAG_NONE) {}
Const(const std::string &str);
Const(int val, int width = 32);
Const(long long val, int width = 32);
Const(RTLIL::State bit, int width = 1);
Const(const std::vector<RTLIL::State> &bits) : bits(bits) { flags = CONST_FLAG_NONE; }
Const(const std::vector<bool> &bits);