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Merge a4d23c0847 into 5aa9bfbf7d

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Emil J 2025-05-08 19:05:34 +02:00 • committed by GitHub
commit bca0f8b84f
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12 changed files with 122 additions and 9 deletions
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backends/verilog/verilog_backend.cc
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@ -419,6 +419,9 @@ void dump_wire(std::ostream &f, std::string indent, RTLIL::Wire *wire)
range = stringf(" [%d:%d]", wire->start_offset, wire->width - 1 + wire->start_offset);
else
range = stringf(" [%d:%d]", wire->width - 1 + wire->start_offset, wire->start_offset);
} else {
if (wire->sbvector)
range = stringf(" [%d:%d]", wire->start_offset, wire->start_offset);
}
if (wire->port_input && !wire->port_output)
f << stringf("%s" "input%s %s;\n", indent.c_str(), range.c_str(), id(wire->name).c_str());