From bc3fc212480abf0ccdf475761bf7a4131074cef5 Mon Sep 17 00:00:00 2001 From: "Emil J. Tywoniak" Date: Thu, 13 Nov 2025 02:02:02 +0100 Subject: [PATCH] microchip: fix IdString memory leak --- techlibs/microchip/microchip_dsp.pmg | 2 +- techlibs/microchip/microchip_dsp_cascade.pmg | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/techlibs/microchip/microchip_dsp.pmg b/techlibs/microchip/microchip_dsp.pmg index 9a6b9e1fa..2573135ee 100644 --- a/techlibs/microchip/microchip_dsp.pmg +++ b/techlibs/microchip/microchip_dsp.pmg @@ -268,7 +268,7 @@ endmatch code if (postAdd) { - if (postAdd->type.in(ID($sub)) && postAddAB == \A) { + if (postAdd->type.in($sub) && postAddAB == \A) { // if $sub, the multiplier output must match to $sub.B, otherwise no match } else { u_postAddAB = postAddAB; diff --git a/techlibs/microchip/microchip_dsp_cascade.pmg b/techlibs/microchip/microchip_dsp_cascade.pmg index d7ea5911e..fa276d5b5 100644 --- a/techlibs/microchip/microchip_dsp_cascade.pmg +++ b/techlibs/microchip/microchip_dsp_cascade.pmg @@ -115,9 +115,9 @@ finally Wire *cascade = module->addWire(NEW_ID, 48); // zero port C and move wire to cascade - dsp_pcin->setPort(ID(C), Const(0, 48)); - dsp_pcin->setPort(ID(CDIN), cascade); - dsp->setPort(ID(CDOUT), cascade); + dsp_pcin->setPort(\C, Const(0, 48)); + dsp_pcin->setPort(\CDIN, cascade); + dsp->setPort(\CDOUT, cascade); // Configure wire to cascade the dsps add_siguser(cascade, dsp_pcin);