3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-08-07 19:51:23 +00:00

Progress in memory_bram

This commit is contained in:
Clifford Wolf 2015-01-02 13:59:47 +01:00
parent 36c20f2ede
commit bbf89c4dc6
5 changed files with 18 additions and 16 deletions

View file

@ -5,5 +5,8 @@ set -e
iverilog -Dvcd_file=\"temp/tb_${1}_${2}.vcd\" -o temp/tb_${1}_${2}.tb temp/brams_${1}_tb.v temp/brams_${1}_ref.v \
temp/synth_${1}_${2}.v temp/brams_${2}.v ../../techlibs/common/simlib.v
temp/tb_${1}_${2}.tb > temp/tb_${1}_${2}.txt
if grep -H -C1 ERROR temp/tb_${1}_${2}.txt; then exit 1; fi
if grep -q ERROR temp/tb_${1}_${2}.txt; then
grep -HC2 ERROR temp/tb_${1}_${2}.txt | head
exit 1
fi
exit 0