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More cleanups related to RTLIL::IdString usage

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This commit is contained in:
Clifford Wolf 2014-08-02 13:11:01 +02:00
parent 14412e6c95
commit b9bd22b8c8
33 changed files with 237 additions and 261 deletions
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8
passes/memory/memory_collect.cc
View file

@ -62,7 +62,7 @@ static void handle_memory(RTLIL::Module *module, RTLIL::Memory *memory)
for (auto &cell_it : module->cells_) {
RTLIL::Cell *cell = cell_it.second;
if ((cell->type == "$memwr" || cell->type == "$memrd") && cell->parameters["\\MEMID"].decode_string() == memory->name)
if ((cell->type == "$memwr" || cell->type == "$memrd") && memory->name == cell->parameters["\\MEMID"].decode_string())
memcells.push_back(cell);
}
@ -70,7 +70,7 @@ static void handle_memory(RTLIL::Module *module, RTLIL::Memory *memory)
for (auto cell : memcells)
{
if (cell->type == "$memwr" && cell->parameters["\\MEMID"].decode_string() == memory->name)
if (cell->type == "$memwr" && memory->name == cell->parameters["\\MEMID"].decode_string())
{
wr_ports++;
del_cells.push_back(cell);
@ -97,7 +97,7 @@ static void handle_memory(RTLIL::Module *module, RTLIL::Memory *memory)
sig_wr_en.append(en);
}
if (cell->type == "$memrd" && cell->parameters["\\MEMID"].decode_string() == memory->name)
if (cell->type == "$memrd" && memory->name == cell->parameters["\\MEMID"].decode_string())
{
rd_ports++;
del_cells.push_back(cell);
@ -129,7 +129,7 @@ static void handle_memory(RTLIL::Module *module, RTLIL::Memory *memory)
sstr << "$mem$" << memory->name << "$" << (autoidx++);
RTLIL::Cell *mem = module->addCell(sstr.str(), "$mem");
mem->parameters["\\MEMID"] = RTLIL::Const(memory->name);
mem->parameters["\\MEMID"] = RTLIL::Const(memory->name.str());
mem->parameters["\\WIDTH"] = RTLIL::Const(memory->width);
mem->parameters["\\OFFSET"] = RTLIL::Const(memory->start_offset);
mem->parameters["\\SIZE"] = RTLIL::Const(memory->size);

4
passes/memory/memory_map.cc
View file

@ -23,10 +23,10 @@
#include <set>
#include <stdlib.h>
static std::string genid(std::string name, std::string token1 = "", int i = -1, std::string token2 = "", int j = -1, std::string token3 = "", int k = -1, std::string token4 = "")
static std::string genid(RTLIL::IdString name, std::string token1 = "", int i = -1, std::string token2 = "", int j = -1, std::string token3 = "", int k = -1, std::string token4 = "")
{
std::stringstream sstr;
sstr << "$memory" << name << token1;
sstr << "$memory" << name.str() << token1;
if (i >= 0)
sstr << "[" << i << "]";

6
passes/memory/memory_unpack.cc
View file

@ -31,7 +31,7 @@ static void handle_memory(RTLIL::Module *module, RTLIL::Cell *memory)
RTLIL::IdString mem_name = RTLIL::escape_id(memory->parameters.at("\\MEMID").decode_string());
while (module->memories.count(mem_name) != 0)
mem_name += stringf("_%d", autoidx++);
mem_name = mem_name.str() + stringf("_%d", autoidx++);
RTLIL::Memory *mem = new RTLIL::Memory;
mem->name = mem_name;
@ -47,7 +47,7 @@ static void handle_memory(RTLIL::Module *module, RTLIL::Cell *memory)
for (int i = 0; i < num_rd_ports; i++)
{
RTLIL::Cell *cell = module->addCell(NEW_ID, "$memrd");
cell->parameters["\\MEMID"] = mem_name;
cell->parameters["\\MEMID"] = mem_name.str();
cell->parameters["\\ABITS"] = memory->parameters.at("\\ABITS");
cell->parameters["\\WIDTH"] = memory->parameters.at("\\WIDTH");
cell->parameters["\\CLK_ENABLE"] = RTLIL::SigSpec(memory->parameters.at("\\RD_CLK_ENABLE")).extract(i, 1).as_const();
@ -61,7 +61,7 @@ static void handle_memory(RTLIL::Module *module, RTLIL::Cell *memory)
for (int i = 0; i < num_wr_ports; i++)
{
RTLIL::Cell *cell = module->addCell(NEW_ID, "$memwr");
cell->parameters["\\MEMID"] = mem_name;
cell->parameters["\\MEMID"] = mem_name.str();
cell->parameters["\\ABITS"] = memory->parameters.at("\\ABITS");
cell->parameters["\\WIDTH"] = memory->parameters.at("\\WIDTH");
cell->parameters["\\CLK_ENABLE"] = RTLIL::SigSpec(memory->parameters.at("\\WR_CLK_ENABLE")).extract(i, 1).as_const();