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cxxrtl: speed up bit repeats (sign extends, etc).

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On Minerva SoC SRAM, depending on the compiler, this change improves
overall time by 4-7%.
This commit is contained in:
whitequark 2020-12-21 02:15:55 +00:00
parent 40ca9d038b
commit b9721bedf0
2 changed files with 28 additions and 5 deletions
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25
backends/cxxrtl/cxxrtl_backend.cc
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@ -832,11 +832,26 @@ struct CxxrtlWorker {
} else if (sig.is_chunk()) {
return dump_sigchunk(sig.as_chunk(), is_lhs, for_debug);
} else {
dump_sigchunk(*sig.chunks().rbegin(), is_lhs, for_debug);
for (auto it = sig.chunks().rbegin() + 1; it != sig.chunks().rend(); ++it) {
f << ".concat(";
dump_sigchunk(*it, is_lhs, for_debug);
f << ")";
bool first = true;
auto chunks = sig.chunks();
for (auto it = chunks.rbegin(); it != chunks.rend(); it++) {
if (!first)
f << ".concat(";
bool is_complex = dump_sigchunk(*it, is_lhs, for_debug);
if (!is_lhs && it->width == 1) {
size_t repeat = 1;
while ((it + repeat) != chunks.rend() && *(it + repeat) == *it)
repeat++;
if (repeat > 1) {
if (is_complex)
f << ".val()";
f << ".repeat<" << repeat << ">()";
}
it += repeat - 1;
}
if (!first)
f << ")";
first = false;
}
return true;
}