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Add nonexcl case test, comment out two others
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2 changed files with 57 additions and 22 deletions
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@ -179,3 +179,21 @@ module cliffordwolf_freduce (
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if (s == 2) o = d;
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end
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endmodule
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module case_nonexclusive_select (
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input wire [1:0] x, y,
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input wire a, b, c, d, e,
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output reg o
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);
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always @* begin
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case (x)
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0, 2: o = b;
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1: o = c;
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default: begin
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o = a;
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if (y == 0) o = d;
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if (y == 1) o = e;
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end
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endcase
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end
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endmodule
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