mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-10-31 19:52:31 +00:00
Code Activity

merge brams_final_map.v into brams_map.v

Browse source
This commit is contained in:
N. Engelhardt 2023-09-18 12:45:06 +02:00 • committed by Martin Povišer
parent 20d864bbde
commit b80b1ab8b6
4 changed files with 1449 additions and 1466 deletions
Download patch file Download diff file Expand all files Collapse all files

1
techlibs/quicklogic/Makefile.inc
View file

@ -31,7 +31,6 @@ $(eval $(call add_share_file,share/quicklogic/qlf_k6n10f,techlibs/quicklogic/qlf
$(eval $(call add_share_file,share/quicklogic/qlf_k6n10f,techlibs/quicklogic/qlf_k6n10f/libmap_brams.txt))
$(eval $(call add_share_file,share/quicklogic/qlf_k6n10f,techlibs/quicklogic/qlf_k6n10f/libmap_brams_map.v))
$(eval $(call add_share_file,share/quicklogic/qlf_k6n10f,techlibs/quicklogic/qlf_k6n10f/brams_map.v))
$(eval $(call add_share_file,share/quicklogic/qlf_k6n10f,techlibs/quicklogic/qlf_k6n10f/brams_final_map.v))
$(eval $(call add_share_file,share/quicklogic/qlf_k6n10f,techlibs/quicklogic/qlf_k6n10f/brams_sim.v))
$(eval $(call add_share_file,share/quicklogic/qlf_k6n10f,techlibs/quicklogic/qlf_k6n10f/bram_types_sim.v))
$(eval $(call add_share_file,share/quicklogic/qlf_k6n10f,techlibs/quicklogic/qlf_k6n10f/cells_sim.v))

1464
techlibs/quicklogic/qlf_k6n10f/brams_final_map.v
View file

File diff suppressed because it is too large Load diff

1449
techlibs/quicklogic/qlf_k6n10f/brams_map.v
View file

File diff suppressed because it is too large Load diff

1
techlibs/quicklogic/synth_quicklogic.cc
View file

@ -263,7 +263,6 @@ struct SynthQuickLogicPass : public ScriptPass {
run("ql_bram_merge");
run("techmap -map " + lib_path + family + "/libmap_brams_map.v");
run("techmap -autoproc -map " + lib_path + family + "/brams_map.v");
run("techmap -map " + lib_path + family + "/brams_final_map.v");
if (bramTypes || help_mode) {
run("ql_bram_types", "(if -bramtypes)");