diff --git a/frontends/verilog/preproc.cc b/frontends/verilog/preproc.cc
index 9781a22d9..e33b0a2c3 100644
--- a/frontends/verilog/preproc.cc
+++ b/frontends/verilog/preproc.cc
@@ -961,6 +961,7 @@ frontend_verilog_preproc(std::istream                 &f,
 		}
 
 		if (tok == "`resetall") {
+			default_nettype_wire = true;
 			continue;
 		}