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verilog: fix $past's signedness
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4 changed files with 40 additions and 1 deletions
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@ -1084,7 +1084,7 @@ void AstNode::detectSignWidthWorker(int &width_hint, bool &sign_hint, bool *foun
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sub_sign_hint = true;
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children.at(0)->detectSignWidthWorker(sub_width_hint, sub_sign_hint);
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width_hint = max(width_hint, sub_width_hint);
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sign_hint = false;
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sign_hint &= sub_sign_hint;
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}
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break;
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}
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@ -3230,6 +3230,7 @@ skip_dynamic_range_lvalue_expansion:;
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reg->str = stringf("$past$%s:%d$%d$%d", filename.c_str(), location.first_line, myidx, i);
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reg->is_reg = true;
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reg->is_signed = sign_hint;
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current_ast_mod->children.push_back(reg);
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