mirror of
https://github.com/YosysHQ/yosys
synced 2025-04-25 01:55:33 +00:00
verilog: fix $past's signedness
This commit is contained in:
parent
63c9c9be5c
commit
b75fa62e9b
4 changed files with 40 additions and 1 deletions
|
@ -4,6 +4,9 @@ List of major changes and improvements between releases
|
|||
|
||||
Yosys 0.17 .. Yosys 0.17-dev
|
||||
--------------------------
|
||||
* Formal Verification
|
||||
- Fixed the signedness of $past's return value to be the same as the
|
||||
argument's instead of always unsigned.
|
||||
|
||||
* Verilog
|
||||
- Fixed an issue where simplifying case statements by removing unreachable
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue