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verilog: fix sizing of constant args for tasks/functions

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- Simplify synthetic localparams for normal calls to update their width
    - This step was inadvertently removed alongside `added_mod_children`
- Support redeclaration of constant function arguments
    - `eval_const_function` never correctly handled this, but the issue
      was not exposed in the existing tests until the recent change to
      always attempt constant function evaluation when all-const args
      are used
- Check asserts in const_arg_loop and const_func tests
- Add coverage for width mismatch error cases
This commit is contained in:
Zachary Snow 2021-02-21 14:45:21 -05:00
parent 127484e675
commit b6af90fe20
10 changed files with 124 additions and 47 deletions
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7
tests/various/const_arg_loop.ys
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@ -1 +1,6 @@
read_verilog const_arg_loop.v
read_verilog -sv const_arg_loop.sv
hierarchy
proc
opt -full
select -module top
sat -verify -seq 1 -tempinduct -prove-asserts -show-all