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Merge pull request #1013 from antmicro/parameter_attributes

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Support for attributes on parameters and localparams for Verilog frontend
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Clifford Wolf 2019-05-16 14:21:18 +02:00 • committed by GitHub
commit b6345b111d
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3 changed files with 24 additions and 2 deletions
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frontends/verilog/verilog_parser.y
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@ -1202,7 +1202,7 @@ param_range:
};
param_decl:
TOK_PARAMETER {
attr TOK_PARAMETER {
astbuf1 = new AstNode(AST_PARAMETER);
astbuf1->children.push_back(AstNode::mkconst_int(0, true));
} param_signed param_integer param_real param_range param_decl_list ';' {
@ -1210,7 +1210,7 @@ param_decl:
};
localparam_decl:
TOK_LOCALPARAM {
attr TOK_LOCALPARAM {
astbuf1 = new AstNode(AST_LOCALPARAM);
astbuf1->children.push_back(AstNode::mkconst_int(0, true));
} param_signed param_integer param_real param_range param_decl_list ';' {