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QLF_TDP36K: test bram_tdp post synth

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Krystine Sherwin 2023-12-01 09:47:46 +13:00
parent 64609afe2c
commit b62173775c
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2 changed files with 7 additions and 4 deletions
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tests/arch/quicklogic/qlf_k6n10f/bram_tdp.ys
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@ -1,5 +1,8 @@
read_verilog bram_tdp.v
hierarchy -top BRAM_TDP
synth_quicklogic -family qlf_k6n10f
read_verilog +/quicklogic/qlf_k6n10f/brams_sim.v +/quicklogic/qlf_k6n10f/sram1024x18_mem.v +/quicklogic/qlf_k6n10f/ufifo_ctl.v +/quicklogic/qlf_k6n10f/TDP18K_FIFO.v
read_verilog -formal bram_tdp.v bram_tdp_tb.v
read_verilog -formal bram_tdp_tb.v
hierarchy -top TB
proc
sim -clock clk -n 20 -assert # -vcd bram_tdp.vcd
sim -clock clk -n 20 -assert # -vcd bram_tdp.vcd